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ISL5216KI-1Z Datasheet

  • ISL5216KI-1Z

  • Four-Channel Programmable Digital DownConverter

  • 65頁

  • INTERSIL   INTERSIL

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ISL5216
24-bit programmable FIR filter output into the range of 20-bit
and shorter words in the output section. Without gain control,
a signal at -72dBFS = 20log
10
(2
-12
) at the input would have
only 4 bits of resolution at the output if a 16 bit word length
were to be used (12 bits less than the full scale 16 bits). The
potential increase in the bit resolution due to processing gain
of the filters can be lost without the use of the AGC.
Figure 4 shows the Block Diagram for the AGC Section. The
FIR filter data output is routed to the Cartesian to polar
coordinate converter after passing through the AGC
multipliers and shift registers. The magnitude output of the
Cartesian to polar coordinate converter is routed through the
AGC error detector, the AGC error scaler and into the AGC
loop filter. This filtered error term is used to drive the AGC
multiplier and shifters, completing the AGC control loop.
The AGC multiplier / shifter portion of the AGC is identified in
Figure 4. The gain control from the AGC loop filter is
AGC LOOP FILTER
sampled when new data enters the multiplier / shifter. The
limit detector detects overflow in the shifter or the multiplier
and saturates the output of I and Q data paths
independently. The shifter has a gain from 0 to 90.31dB in
6.021dB steps, where 90.31dB = 20log
10
(2
N
) when
N = 15. The mantissa provides up to an additional 6.02dB of
gain. The gain in dB from the mantissa is:
20log
10
[1+(X)2
-14
], where X is the fractional part of the
mantissa interpreted as an unsigned integer ranging from 0
to 2
14
- 1.
Thus, the AGC multiplier / shifter transfer function is
expressed as:
AGC Mult/Shift Gain = 2
N
[1+ (X)2
-14
]
where N, the shifter exponent, has a range of 0<N<15 and X,
the mantissa, has a range of 0<X<(2
14
-1).
碌P
AGC ERROR SCALING
(RANGE = -2.18344 TO 2.18344)
AGC
ERROR
DETECTOR
REGISTER
LIMITER
SERIAL
OUT
19
MSB = 0
M
U
X
+
28
SHIFT
REGISTER
16
碌P
(11 MANTISSA
4 EXPONENT)
EXP
MSB = 0
LIMIT
DET
EN AGC
LOAD
AGCGNSEL
4
MANTISSA
4
16
鈭?/div>
AGC REGISTER 0
AGC REGISTER 1
EXP
鈥?/div>
18
4
EXP=2
NNNN
16 MANTISSA =
01.XXXXXXXXXXXXXX
LIMIT
DET
MAGNITUDE
(RANGE = 0 TO 2.32887)
16
(RANGE = 0 TO 1)
LIMITER
SHIFTER
24
IFIR
24
24
IAGC
LIMIT
DET
CARTESIAN
TO
POLAR
COORDINATE
CONVERTER
(G = 1.64676)
SHIFTER
QFIR
LIMITER
24
24
24
QAGC
AGC MULTIPLIER/SHIFTER
鈥?/div>
Controlled via microprocessor interface.
FIGURE 4. AGC FUNCTIONAL BLOCK DIAGRAM
24
EXP
鈥?/div>
MAN
鈥?/div>
LOOP GAIN 1
LOOP GAIN 0
UPPER LIMIT
鈥?/div>
LOWER LIMIT
鈥?/div>
MAN
鈥?/div>
UNSIGNED
鈥?/div>
THRESHOLD
STT.TTTTTTTTTTTTT
(S = 0)
July 8, 2005

ISL5216KI-1Z 產(chǎn)品屬性

  • Intersil

  • + 85 C

  • BGA

  • - 40 C

  • Tray

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