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ISL5761IAZ Datasheet

  • ISL5761IAZ

  • 10-bit, +3.3V, 130/210+MSPS, High Speed D/A Converter

  • 13頁

  • INTERSIL   INTERSIL

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ISL5761
Pin Descriptions
PIN NO.
1-10
PIN NAME
D9 (MSB) Through
D0 (LSB)
SLEEP
DESCRIPTION
Digital Data Bit 9, (Most Significant Bit) through Digital Data Bit 0, (Least Significant Bit).
15
Control Pin for Power-Down mode. Sleep Mode is active high; Connect to ground for Normal Mode. Sleep pin
has internal 20碌A(chǔ) active pulldown current.
Connect to analog ground to enable internal 1.2V reference or connect to AV
DD
to disable internal reference.
Reference voltage input if internal reference is disabled. Reference voltage output if internal reference is
enabled. Use 0.1碌F cap to ground when internal reference is enabled.
Full Scale Current Adjust. Use a resistor to ground to adjust full scale output current. Full Scale Output Current
= 32 x V
FSADJ
/R
SET
.
No Connect. These should be grounded, but can be left disconnected.
The complementary current output of the device. Full scale output current is achieved when all input bits are
set to binary 0.
Current output of the device. Full scale output current is achieved when all input bits are set to binary 1.
Connect 0.1碌F capacitor to ACOM.
Analog Supply (+3.0V to +3.6V).
Connect to Analog Ground.
Connect to Digital Ground.
Digital Supply (+3.0V to +3.6V).
Clock Input.
16
17
REFLO
REFIO
18
FSADJ
19, 25
21
NC
IOUTB
22
23
24
20
26, 11-14
27
28
IOUTA
COMP
AV
DD
ACOM
DCOM
DV
DD
CLK
3

ISL5761IAZ 產(chǎn)品屬性

  • Solutions for Industrial Control Applications

  • 50

  • 集成電路 (IC)

  • 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器

  • -

  • -

  • 10

  • 并聯(lián)

  • 1

  • 單電源

  • 120mW

  • -40°C ~ 85°C

  • 表面貼裝

  • 28-TSSOP(0.173",4.40mm 寬)

  • 28-TSSOP

  • 管件

  • 2 電流,單極

  • 150M

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