最新免费av在线观看,亚洲综合一区成人在线,中文字幕精品无码一区二区三区,中文人妻av高清一区二区,中文字幕乱偷无码av先锋

ISL5740 Datasheet

  • ISL5740

  • 3V Dual 10-Bit, 20/40/60MSPS A/D Converter with Internal Vol...

  • Intersil   Intersil

掃碼查看芯片數(shù)據(jù)手冊

上傳產(chǎn)品規(guī)格書

PDF預(yù)覽

ISL5740
analog sample is taken (see the timing diagram in Figure 1).
This time delay is speci鏗乪d as the data latency. After the
data latency time, the digital data representing each
succeeding analog sample is output during the following
clock cycle. The digital output data is provided in offset
binary format (see Table 1, A/D Code Table).
signi鏗乧antly with the value of the analog input common
mode voltage.
For the AC coupled differential input (Figure 16) and with V
RIN
connected to V
ROUT
, full scale is achieved when the V
IN
and
-V
IN
input signals are 0.5V
P-P
, with -V
IN
being 180 degrees
out of phase with V
IN
. The converter will be at positive full
scale when the I/Q
IN
+ input is at I/Q
VRIN
+ 0.25V and the
I/Q
IN
- input is at I/Q
VRIN
- 0.25V (I/Q
IN
+ - I/Q
IN
- = +0.5V).
Conversely, the converter will be at negative full scale when
the I/Q
IN
+ input is equal to I/Q
VRIN
- 0.25V and I/Q
IN
- is at
I/Q
VRIN
+ 0.25V (I/Q
IN
+ - I/Q
IN
- = -0.5V).
The analog input can be DC coupled (Figure 17) as long as
the inputs are within the analog input common mode voltage
range (0.25V
鈮?/div>
VDC
鈮?/div>
2.75V).
The resistors, R, in Figure 17 are not absolutely necessary
but may be used as load setting resistors. A capacitor, C,
connected from I/Q
IN
+ to I/Q
IN
- will help 鏗乴ter any high
frequency noise on the inputs, also improving performance.
Values around 20pF are suf鏗乧ient and can be used on AC
coupled inputs as well. Note, however, that the value of
capacitor C chosen must take into account the highest
frequency component of the analog input signal.
V
IN
V
DC
R
C
I/Q
IN
+
ISL5740
I/QV
RIN
-V
IN
V
DC
R
I/Q
IN
-
Internal Reference Voltage Output, V
ROUT
The ISL5740 is equipped with an internal 1.25V bandgap
reference voltage generator, therefore, no external reference
voltage is required. V
ROUT
should be connected to V
RIN
when using the internal reference voltage. An external, user-
supplied, 0.1碌F capacitor may be connected from the V
ROUT
output pin to filter any stray board noise.
Reference Voltage Inputs, I/Q V
REFIN
The ISL5740 is designed to accept a 1.25V reference
voltage source at the V
RIN
input pins for the I and Q
channels. Typical operation of the converter requires V
RIN
to
be set at 1.25V. The ISL5740 is tested with V
RIN
connected
to V
ROUT
yielding a fully differential analog input voltage
range of
鹵0.5V.
The user does have the option of supplying an external 1.25V
reference voltage. As a result of the high input impedance
presented at the V
RIN
input pin, M鈩?typically, the external
reference voltage being used is only required to source small
amount of reference input current.
In order to minimize overall converter noise it is
recommended that adequate high frequency decoupling be
provided at the reference voltage input pin, V
RIN
.
Analog Input, Differential Connection
The analog input of the ISL5740 is a differential input that
can be con鏗乬ured in various ways depending on the signal
source and the required level of performance. A fully
differential connection (Figure 16 and Figure 17) will deliver
the best performance from the converter.
FIGURE 5. DC COUPLED DIFFERENTIAL INPUT
Analog Input, Single-Ended Connection
V
IN
R
I/Q
IN
+
ISL5740
I/QV
RIN
R
-V
IN
I/Q
IN
-
V
IN
R
V
DC
ISL5740
I/Q
IN
-
I/Q
IN
+
The con鏗乬uration shown in Figure 18 may be used with a
single ended AC coupled input.
FIGURE 4. AC COUPLED DIFFERENTIAL INPUT
Since the ISL5740 is powered by a single +3V analog
supply, the analog input is limited to be between ground and
+3V. For the differential input connection this implies the
analog input common mode voltage can range from 0.25V to
2.75V. The performance of the ADC does not change
FIGURE 6. AC COUPLED SINGLE ENDED INPUT
Again, with V
RIN
connected to V
ROUT
, if V
IN
is a 1V
P-P
sinewave, then I/Q
IN
+ is a 1.0V
P-P
sinewave riding on a
positive voltage equal to V
DC
. The converter will be at
positive full scale when I/Q
IN
+ is at V
DC
+ 0.5V (I/Q
IN
+ -
3-10

ISL5740 PDF文件相關(guān)型號(hào)

ISL57402IN,ISL57403IN

ISL5740相關(guān)型號(hào)PDF文件下載

  • 型號(hào)
    版本
    描述
    廠商
    下載
  • 英文版
    Low-Voltage, Single Supply, Dual SPST, SPDT Analog Switches
    INTERSIL
  • 英文版
    Low-Voltage, Single Supply, Dual SPST, SPDT Analog Switches
    INTERSIL [...
  • 英文版
    Low-Voltage, Single Supply, Dual SPST, SPDT Analog Switches
    INTERSIL
  • 英文版
    Low-Voltage, Single Supply, Dual SPST, SPDT Analog Switches
    INTERSIL [...
  • 英文版
    Low-Voltage, Single Supply, Dual SPST, SPDT Analog Switches
    INTERSIL
  • 英文版
    Low-Voltage, Single Supply, Dual SPST, SPDT Analog Switches
    INTERSIL
  • 英文版
    Four-Channel Programmable Digital DownConverter
    INTERSIL
  • 英文版
    Quad Programmable Up Converter
    INTERSIL
  • 英文版
    Pre-Distortion Linearizer
    INTERSIL
  • 英文版
    CommLink Direct Digital Synthesizer
    Intersil
  • 英文版
    Four-Channel Wideband Programmable DownConverter
    INTERSIL
  • 英文版
    3.3V Ringing SLIC Family for Voice Over Broadband (VOB)
    INTERSIL
  • 英文版
    Low Power Ringing SLIC for Home Gateways
    INTERSIL
  • 英文版
    Dual 8-bit, +3.3V, 260+MSPS, High Speed D/A Converter
    intersil
  • 英文版
    Dual 8-bit, +3.3V, 130/210+MSPS, High Speed D/A Converter
    INTERSIL
  • 英文版
    3V Dual 8-Bit, 20/40/60MSPS A/D Converter with Internal Volt...
    Intersil
  • 英文版
    Dual 10-bit, +3.3V, 260+MSPS, High Speed D/A Converter
    intersil
  • 英文版
    Dual 10-bit, +3.3V, 130/210+MSPS, High Speed D/A Converter
    INTERSIL
  • 英文版
    3V Dual 10-Bit, 20/40/60MSPS A/D Converter with Internal Vol...
    Intersil
  • 英文版
    10-bit, +3.3V, 260+MSPS, High Speed D/A Converter
    INTERSIL

掃碼下載APP，
一鍵連接廣大的電子世界。

在線人工客服

買家服務(wù)：
賣家服務(wù)：
技術(shù)客服：

0571-85317607

網(wǎng)站技術(shù)支持

13606545031

客服在線時(shí)間周一至周五
9:00-17:30

關(guān)注官方微信號(hào)，
第一時(shí)間獲取資訊。

建議反饋

聯(lián)系人：

聯(lián)系方式：

按住滑塊，拖拽到最右邊
>>
感謝您向阿庫提出的寶貴意見，您的參與是維庫提升服務(wù)的動(dòng)力！意見一經(jīng)采納，將有感恩紅包奉上哦！