and input switching based on serial inputs.
dB, 4.5-dB steps between 鈥?2 dB and 鈥?0 dB, and 鈥?/div>
鈭?
Independent control over left and right channels
provides balance control.
鈥?Equalizer:
The chip provides control in 2-dB steps over the range
between +10 dB and 鈥?0 dB. Four of the five bands
have peaking equalization; the remaining one, shelving
equalization.
鈥?Selector:
The left and right channels each offer a choice of four
inputs. An external constant determines the
amplification for the input signal.
SANYO: QFP64E
Features
鈥?Built-in buffer amplifiers reduce the number of external
parts necessary.
鈥?Silicon gate CMOS reduces switching noise.
鈥?Serial data input
鈥擲upports CCB* format communication with the
system controller.
鈥?A built-in reference voltage circuit divides the supply
voltage (V
DD
) in half.
*
鈥?CCB is a trademark of SANYO ELECTRIC CO., LTD.
鈥?CCB is SANYO鈥檚 original bus format and all the bus
addresses are controlled by SANYO.
Specifications
Absolute Maximum Ratings
at Ta = 25擄C, V
SS
= 0 V
Parameter
Maximum supply voltage
Maximum input voltage
Allowable power dissipation
Operating temperature
Storage temperature
Symbol
V
DD
max
V
IN
max
Pd max
Topr
Tstg
V
DD
CL, DI, CE, L1 to L4, R1 to R4, LTIN, RTIN, LVRIN,
RVRIN
Ta
鈮?/div>
85擄C
Conditions
Ratings
12
V
SS
鈥?0.3 to
V
DD
+ 0.3
310
鈥?0 to +85
鈥?0 to +125
Unit
V
V
mW
擄C
擄C
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110 JAPAN
91096HA (OT)/81095HA (OT) No. 5466-1/17
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