M14C64, M14C32
the data byte output, and the memory continues to
output the next byte in sequence. To terminate the
stream of bytes, the master must
not
acknowledge
the last byte output, and
must
generate a STOP
condition. The output data comes from consecu-
tive addresses, with the internal address counter
automatically incremented after each byte output.
After the last memory address, the address
counter will 鈥榬oll-over鈥?and the memory will contin-
ue to output data from the start of the memory
block.
Acknowledge in Read Mode
In all read modes the memory waits for an ac-
knowledgment during the 9
th
bit time. If the master
does not pull the SDA line low during this time, the
memory terminates the data transfer and switches
to its standby state.
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