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M14C64 Datasheet

  • M14C64

  • Memory Card IC 64/32 Kbit Serial IC Bus EEPROM

  • 14頁

  • STMICROELECTRONICS   STMICROELECTRONICS

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M14C64, M14C32
Figure 2. D20 Contact Connections
Figure 3. D22 Contact Connections
VCC
WC
GND
VCC
WC
GND
SCL
SDA
SCL
SDA
AI02168
AI02204
form only. For availability of the M14C64 in wafer
form, please contact your ST sales office.
Each memory is compatible with the I
2
C extended
memory standard. This is a two wire serial inter-
face that uses a bi-directional data bus and serial
clock. The memory carries a built-in 7-bit unique
Device Type Identifier code (1010000) in accord-
ance with the I
2
C bus definition. Only one memory
can be attached to each I
2
C bus.
The memory behaves as a slave device in the I
2
C
protocol, with all memory operations synchronized
by the serial clock. Read and write operations are
initiated by a START condition, generated by the
bus master. The START condition is followed by
the Device Select Code which is composed of a
stream of 7 bits (1010000), plus one read/write bit
(R/W) and is terminated by an acknowledge bit.
When writing data to the memory, the memory in-
serts an acknowledge bit during the 9
th
bit time,
following the bus master鈥檚 8-bit transmission.
When data is read by the bus master, the bus
master acknowledges the receipt of the data byte
in the same way. Data transfers are terminated by
a STOP condition after an Ack for WRITE, and af-
ter a NoACK for READ.
Power On Reset: V
CC
Lock-Out Write Protect
In order to prevent data corruption and inadvertent
write operations during power up, a Power On Re-
set (POR) circuit is included. The internal reset is
held active until the V
CC
voltage has reached the
POR threshold value, and all operations are dis-
abled 鈥?the device will not respond to any com-
mand. In the same way, when V
CC
drops from the
operating voltage, below the POR threshold value,
all operations are disabled and the device will not
respond to any command. A stable and valid V
CC
must be applied before applying any logic signal.
Table 2. Absolute Maximum Ratings
1
Symbol
T
A
T
STG
V
IO
V
CC
V
ESD
Electrostatic Discharge Voltage (Machine model)
3
400
V
Note: 1. Except for the rating 鈥淥perating Temperature Range鈥? stresses above those listed in the Table 鈥淎bsolute Maximum Ratings鈥?may
cause permanent damage to the device. These are stress ratings only, and operation of the device at these or any other conditions
above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating condi-
tions for extended periods may affect device reliability. Refer also to the ST SURE Program and other relevant quality documents.
2. MIL-STD-883C, 3015.7 (100 pF, 1500
鈩?
3. EIAJ IC-121 (Condition C) (200 pF, 0
鈩?
Parameter
Ambient Operating Temperature
Storage Temperature
Input or Output range
Supply Voltage
Electrostatic Discharge Voltage (Human Body model)
2
Wafer form
Module form
Value
0 to 70
-65 to 150
-40 to 120
-0.6 to 6.5
-0.3 to 6.5
4000
Unit
擄C
擄C
V
V
V
2/14

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