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SLC64A Datasheet

  • SLC64A

  • National Semiconductor [+3.3V LVDS Receiver 24-Bit Flat Pan...

  • NSC

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DS90CF384A/DS90CF364A
Absolute Maximum Ratings
(Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Supply Voltage (V
CC
)
CMOS/TTL Input Voltage
CMOS/TTL Output Voltage
LVDS Receiver Input Voltage
Junction Temperature
Storage Temperature
Lead Temperature
(Soldering, 4 sec)
Solder Reflow Temperature
(20 sec for FBGA)
Maximum Package Power
Dissipation Capacity
@
25藲C
MTD56 (TSSOP) Package:
DS90CF384A
MTD48 (TSSOP) Package:
DS90CF364A
1.89 W
1.61 W
+220藲C
鈭?.3V to +4V
鈭?.3V to (V
CC
+ 0.3V)
鈭?.3V to (V
CC
+ 0.3V)
鈭?.3V to (V
CC
+ 0.3V)
+150藲C
鈭?5藲C to +150藲C
+260藲C
SLC (FBGA) Package:
DS90CF384A
Package Derating:
DS90CF384AMTD
DS90CF364AMTD
DS90CF384ASLC
ESD Rating
(HBM, 1.5 k鈩? 100 pF)
(EIAJ, 0鈩? 200 pF)
12.4 mW/藲C above +25藲C
15 mW/藲C above +25藲C
10.2 mW/藲C above +25藲C
2.0 W
>
7 kV
>
700V
Recommended Operating
Conditions
Min Nom Max Units
Supply Voltage (V
CC
)
Operating Free Air
Temperature (T
A
)
Receiver Input Range
Supply Noise Voltage (V
CC
)
鈭?0 +25 +70
0
2.4
100
藲C
V
mV
PP
3.0
3.3
3.6
V
Electrical Characteristics
Over recommended operating supply and temperature ranges unless otherwise specified.
Symbol
V
IH
V
IL
V
CL
I
IN
Parameter
High Level Input Voltage
Low Level Input Voltage
Input Clamp Voltage
Input Current
I
CL
= 鈭?8 mA
V
V
CMOS/TTL DC SPECIFICATIONS
V
OH
V
OL
I
OS
V
TH
V
TL
I
IN
High Level Output Voltage
Low Level Output Voltage
Output Short Circuit Current
Differential Input High Threshold
Differential Input Low Threshold
Input Current
V
V
RECEIVER SUPPLY CURRENT
ICCRW
Receiver Supply Current
Worst Case
C
L
= 8 pF,
Worst Case Pattern,
DS90CF384A
(Figures
1, 4 )
ICCRW
Receiver Supply Current
Worst Case
C
L
= 8 pF,
Worst Case Pattern,
DS90CF364A
(Figures
1, 4 )
ICCRG
Receiver Supply Current,
16 Grayscale
C
L
= 8 pF,
16 Grayscale Pattern,
(Figures 2, 3, 4 )
f = 32.5 MHz
f = 37.5 MHz
f = 65 MHz
f = 32.5 MHz
f = 37.5 MHz
f = 65 MHz
f = 32.5 MHz
f = 37.5 MHz
f = 65 MHz
49
53
81
49
53
78
28
30
43
65
70
105
55
60
90
45
47
60
mA
mA
mA
mA
mA
mA
mA
mA
mA
IN
IN
IN
IN
Conditions
Min
2.0
GND
Typ
Max
V
CC
0.8
Units
V
V
V
碌A
碌A
V
CMOS/TTL DC SPECIFICATIONS (For Power Down Pin)
鈭?.79
+1.8
鈭?0
2.7
0
3.3
0.06
鈭?0
鈭?.5
+10
= 0.4V, 2.5V or V
CC
= GND
I
OH
= 鈭?.4 mA
I
OL
= 2 mA
V
OUT
= 0V
V
= +1.2V
0.3
鈭?20
+100
V
mA
mV
mV
碌A
碌A
LVDS RECEIVER DC SPECIFICATIONS
CM
鈭?00
= +2.4V, V
CC
= 3.6V
= 0V, V
CC
= 3.6V
鹵
10
鹵
10
www.national.com
2

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