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MIC74 Datasheet

  • MIC74

  • Micrel Semiconductor [2-Wire Serial I/O Expander and Fan Co...

  • MICREL   MICREL

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MIC74
Micrel
Functional Diagram
INTn
IMn
STATUSn
Q
S
EDGE
DETECT
Q R
STATUS_READn
DATAn
(INPUT)
OUT_CFGn
V
DD
Pn (typical I/O port)
DIRn
DATAn
(OUTPUT)
GND
Typical I/O Port (Fan Speed Control Logic Not Shown)
Functional Description
Pin Descriptions
VDD
Power supply input connection. See 鈥淥perating Ratings.鈥?/div>
GND
Ground or return connection for all MIC74 functions.
A2
0
0
0
0
1
1
1
1
Inputs
A1
0
0
1
1
0
0
1
1
A0
0
1
0
1
0
1
0
1
MIC74 Slave Address
Binary
010 0
000
b
010 0
001
b
010 0
010
b
010 0
011
b
010 0
100
b
010 0
101
b
010 0
110
b
010 0
111
b
Hex
20
h
21
h
22
h
23
h
24
h
25
h
26
h
27
h
CLK
An CLK signal is provided by the host (master) and is
common to all devices on the bus. The CLK signal controls all
transactions in both directions on the bus and is applied to
each MIC74 at the CLK pin.
DATA
Serial data is bidirectional and is common to all devices on the
bus. The MIC74鈥檚 DATA output is open-drain.
The DATA line requires one external pull-up resistor or
current source per system that can be located anywhere
along the line.
A2, A1, A0
An MIC74 responds to its own unique address which is
assigned using the A0鈥揂2 pins. A0鈥揂2 set the three LSBs
(least significant bits) of the MIC74鈥檚 7-bit slave address. The
three address pins allow eight unique MIC74 addresses in a
system. When the MIC74鈥檚 address matches an address
received in the serial bit stream, communication is initiated.
A2, A1 and A0 should be connected to GND or V
DD
. The state
of these pins is sampled only once at device power-on. New
slave addresses are not accepted unless the MIC74 is
powered off then on.
Table 1. MIC74 Address Configuration
Alert Response Address
The MIC74 also responds to the ARA (Alert Response
Address). The ARA is used by the master (host) to request the
address of a slave that has provided an interrupt to the master
via the /ALERT line.
The ARA is a single address (0001 100) common to all slaves
and is described in more detail under 鈥淚nterrupt Generation鈥?/div>
with related information under 鈥?ALERT.鈥?Also see Figure 7.
Pn, /SHDN, and /FS0鈥?FS2
P0 through P7 are general-purpose input/output bits. Each bit
is independently programmable as an input or an output. If
programmed as an output, each bit is further programmable
as either a complementary push-pull or open-drain output.
If properly enabled, any Pn programmed as an input will
generate an interrupt to the host using the /ALERT output
when the input changes state. In this way, the MIC74 can
August 1, 2000
7
MIC74

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