power dissipation. If the load impedance is low, it is possible
temperature rating.
and output stage power. Supply power (P
V鈥?/div>
) and supply current (I
S
).
R
OUT
=
The above addresses only steady state (dc) conditions. For
non-dc conditions the user must estimate power dissipation
based on rms value of the signal.
The task is one of determining the allowable on-chip power
dissipation for operation at a given ambient temperature and
power supply voltage. From this determination, one may
calculate the maximum allowable power dissipation and,
after subtracting P
S
, determine the maximum allowable load
current, which in turn can be used to determine the miniumum
load impedance that may safely be driven. The calculation is
summarized below.
P
D(max)
=
T
J(max)
鈭?/div>
T
A
胃
JA
胃
JA(SOT-23-5)
= 260擄C/W
胃
JA(MSOP-8)
= 85擄C/W
Driving Capacitive Loads
Driving a capacitive load introduces phase-lag into the output
signal, and this in turn reduces op-amp system phase margin.
The application that is least forgiving of reduced phase
margin is a unity gain amplifier. The MIC7300 can typically
drive a 2500pF capacitive load connected directly to the
output when configured as a unity-gain amplifier and pow-
ered with a 2.2V supply. At 10V operation the circuit typically
drives 6000pF. Phase margin is typically 40擄.
Using Large-Value Feedback Resistors
A large-value feedback resistor (> 500k鈩? can reduce the
phase margin of a system. This occurs when the feedback
resistor acts in conjunction with input capacitance to create
phase lag in the feedback signal. Input capacitance is usually
a combination of input circuit components and other parasitic
capacitance, such as amplifier input capacitance and stray
printed circuit board capacitance.
Figure 2 illustrates a method of compensating phase lag
caused by using a large-value feedback resistor. Feedback
capacitor C
FB
introduces sufficient phase lead to overcome
MIC7300
8
November 1999
                         
                        
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