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LPC47M172_07 Datasheet

  • LPC47M172_07

  • SMSC Corporation [Advanced I/O Controller with Motherboard ...

  • SMSC   SMSC

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Advanced I/O Controller with Motherboard GLUE Logic
Datasheet
PHASE
Command
Execution
R/W
W
W
D7
0
0
D6
MFM
0
D5
0
0
READ ID
DATA BUS
D4 D3
D2
0
1
0
0
0
HDS
D1
1
DS1
D0
0
DS0
REMARKS
Commands
The first correct ID
information on the
Cylinder is stored in
Data Register
Status information after
Command execution.
Result
R
ST0
Disk status after the
Command has
completed
R
R
R
R
R
R
ST1
ST2
C
H
R
N
PHASE
Command
R/W
W
D7
0
OW
D6
0
0
PERPENDICULAR MODE
DATA BUS
D5 D4 D3 D2
D1
0
1
0
0
1
D3 D2 D1 D0
GAP
D0
REMARKS
0
Command Codes
WGATE
PHASE
Command
R/W
W
D7
D6
INVALID CODES
DATA BUS
D5 D4 D3 D2 D1
Invalid Codes
D0
Result
R
ST0
REMARKS
Invalid Command Codes
(NoOp 鈥?FDC goes into
Standby State)
ST0 = 80H
PHASE
Command
Result
R/W
W
R
D7
LOCK
0
D6
0
0
LOCK
DATA BUS
D5
D4
D3
0
1
0
0
LOCK
0
D2
1
0
D1
0
0
D0
0
0
REMARKS
Command Codes
SC is returned if the last command that was issued was the Format command. EOT is returned if the last
command was a Read or Write.
Note:
These bits are used internally only. They are not reflected in the Drive Select pins. It is the user鈥檚
responsibility to maintain correspondence between these bits and the Drive Select pins (DOR).
SMSC/Non-SMSC Register Sets (Rev.
01-11-07)
Page 61
SMSC LPC47M172
DATASHEET

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