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Advanced I/O Controller with Motherboard GLUE Logic

Datasheet

SIGNAL NAME

nIDE_RSTDRV

nPS_ON

nBACKFEED_CUT

SCK_BJT_GATE

nCDC_DWN_ENAB

YLW_LED

nHD_LED

DDCSDA_3V

DDCSCL_3V

DDCSDA_5V

DDCSCL_5V

SMB_CLK_M

SMB_CLK_R

SMB_DAT_M

SMB_DAT_R

GRN_LED

GPIOs

RESISTOR VALUE

1 kohm

1 kohm

1 kohm

1 kohm

10 kohm

220 ohm

330 ohm

4.7 kohm

4.7 kohm

2.2 kohm

2.2 kohm

2.7 kohm

2.7 kohm

2.7 kohm

2.7 kohm

220 ohm

design-dependant

NOTES

Pull-up to VCC5V

Pull-up to V_5P0_STBY

Pull-up to V_5P0_STBY

Pull-up to V_5P0_STBY

Pull-down to VSS

Pull-up to VTR

Pull-up to VCC

Pull-up to VCC

Pull-up to VCC

Pull-up to VCC5V

Pull-up to VCC5V

Pull-up to VCC

Pull-up to VTR

Pull-up to VCC

Pull-up to VTR

Pull-up to VTR

Pull-up to appropriate voltage

(not to exceed 5V)

3.4

Default State of Pins

The following table shows the default state of pins.

Notes:

Off

The pin is not powered by suspend supply and is valid under main power only.

Hi-Z

The pin is powered, but tri-stated either because the pin is open-drain or VCC function is selected on VTR

powered pin. The pin requires external pull-up when tri-stated.

Active

The pin is powered and active high.

Running

The input clock is powered and running.

Input

The pin is powered and driven by external circuitry to high or low level.

Out

The pin is powered and driven to high or low level by the part.

The input or output configuration state of the pin is retained and is not affected by PCI Reset or VCC POR.

SMSC/Non-SMSC Register Sets (Rev.

01-11-07)

Page 24

SMSC LPC47M172

DATASHEET

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