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LPC47M172_07 Datasheet

  • LPC47M172_07

  • SMSC Corporation [Advanced I/O Controller with Motherboard ...

  • 1113.49KB

  • SMSC   SMSC

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Advanced I/O Controller with Motherboard GLUE Logic
Datasheet
PIN#
63
NAME
(NOTE 1)
nPCI_RESET
DESCRIPTION
Active low input used as LPC Interface
Reset. 3.3V and 5V buffered copy of PCI
Reset signal is available on
nPCIRST_OUT and nIDE_RSTDRV.
These pins are listed under GLUE PINS.
Power Management Event Output. This
active low Power Management Event
signal allows to request wakeup. This pin
can be configured as Push-Pull Output.
FDD INTERFACE (14)
This input senses that the drive door is
open or that the diskette has possibly
been changed since the last drive
selection. This input is inverted and read
via bit 7 of I/O address 3F7H. The
nDSKCHG bit also depends upon the
state of the Force Disk Change bits in the
Force Disk Change register (see Chapter
11 Configuration).
Head Select Output. This high current
output selects the floppy disk side for
reading or writing. A logic 鈥?鈥?on this pin
means side 0 will be accessed, while a
logic 鈥?鈥?means side 1 will be accessed.
Can be configured as an Open-Drain
Output.
Raw serial bit stream from the disk drive,
low active. Each falling edge represents
a flux transition of the encoded data.
This active low Schmitt Trigger input
senses from the disk drive that a disk is
write protected. Any write command is
ignored. The nWRPRT bit also depends
upon the state of the Force Write Protect
bit in the FDD Option register (see the
Configuration Registers section).
This active low Schmitt Trigger input
senses from the disk drive that the head
is positioned over the outermost track.
Write Gate Output. This active low high
current driver allows current to flow
through the write head. It becomes active
just prior to writing to the diskette. Can be
configured as an Open-Drain Output.
Write Disk Data Output. This active low
high current driver provides the encoded
data to the disk drive. Each falling edge
causes a flux transition on the media.
Can be configured as an Open-Drain
Output.
BUFFER
NAME
(NOTE 2)
PCI_I
PWR
WELL
(NOTE 3)
VCC
NOTES
99
nIO_PME
OD8
VTR
9
nDSKCHG
IS
VCC
10
nHDSEL
O12
VCC
11
nRDATA
IS
VCC
12
nWRTPRT
IS
VCC
13
nTRK0
IS
VCC
14
nWGATE
O12
VCC
15
nWDATA
O12
VCC
SMSC/Non-SMSC Register Sets (Rev.
01-11-07)
Page 15
SMSC LPC47M172
DATASHEET

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