2.7 k鈩?/div>
Test Condition
Output Load
Output Load Capacitance, C
L
(including jig capacitance)
Input Rise and Fall Times
Input Pulse Levels
Input timing measurement
reference levels
1 TTL gate
100
20
0.45鈥?.4
0.8
2.0
pF
ns
V
V
V
Note:
Diodes are IN3064 or equivalent
21444B-15
Output timing measurement
reference levels
Figure 8.
Test Setup
KEY TO SWITCHING WAVEFORMS
WAVEFORM
INPUTS
Steady
Changing from H to L
Changing from L to H
Don鈥檛 Care, Any Change Permitted
Does Not Apply
Changing, State Unknown
Center Line is High Impedance State (High Z)
OUTPUTS
KS000010-PAL
24
Am29F016B