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Am29F016B-70EE Datasheet

  • Am29F016B-70EE

  • Advanced Micro Devices [16 Megabit (2 M x 8-Bit) CMOS 5.0 V...

  • AMD

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P R E L I M I N A R Y
Hardware Data Protection
START
RESET# = V
ID
(Note 1)
Perform Erase or
Program Operations
The command sequence requirement of unlock cycles
for programming or erasing provides data protection
against inadvertent writes (refer to the Command Defi-
nitions table). In addition, the following hardware data
protection measures prevent accidental erasure or pro-
gramming, which might otherwise be caused by spuri-
ous system level signals during V
CC
power-up and
power-down transitions, or from system noise.
Low V
CC
Write Inhibit
When V
CC
is less than V
LKO
, the device does not ac-
cept any write cycles. This protects data during V
CC
power-up and power-down. The command register and
all internal program/erase circuits are disabled, and the
device resets. Subsequent writes are ignored until V
CC
is greater than V
LKO
. The system must provide the
proper signals to the control pins to prevent uninten-
tional writes when V
CC
is greater than V
LKO
.
21444B-8
RESET# = V
IH
Temporary
Sector Group Unprotect
Completed (Note 2)
Write Pulse 鈥淕litch鈥?Protection
Noise pulses of less than 5 ns (typical) on OE#, CE# or
WE# do not initiate a write cycle.
Logical Inhibit
Write cycles are inhibited by holding any one of OE#
= V
IL
, CE# = V
IH
or WE# = V
IH
. To initiate a write cy-
cle, CE# and WE# must be a logical zero while OE#
is a logical one.
Power-Up Write Inhibit
If WE# = CE# = V
IL
and OE# = V
IH
during power
up, the device does not accept commands on the
rising edge of WE#. The internal state machine is
a u t o m a ti c a l l y r e s e t to r e a d i n g a r ray d at a o n
power-up.
Notes:
1. All protected sector groups unprotected.
2. All previously protected sector groups are protected
once again.
Figure 1.
Temporary Sector Group Unprotect
Operation
12
Am29F016B

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