ISL6614
Functional Pin Description
PACKAGE PIN #
SOIC
1
DFN
15
PIN
SYMBOL
PWM1
FUNCTION
The PWM signal is the control input for the Channel 1 driver. The PWM signal can enter three distinct states during
operation, see the three-state PWM Input section under DESCRIPTION for further details. Connect this pin to the PWM
output of the controller.
The PWM signal is the control input for the Channel 2 driver. The PWM signal can enter three distinct states during
operation, see the three-state PWM Input section under DESCRIPTION for further details. Connect this pin to the PWM
output of the controller.
Bias and reference ground. All signals are referenced to this node.
Lower gate drive output of Channel 1. Connect to gate of the low-side power N-Channel MOSFET.
This pin supplies power to both the lower and higher gate drives in ISL6614. Its operating range is +5V to 12V.
Place a high quality low ESR ceramic capacitor from this pin to GND.
It is the power ground return of both low gate drivers.
No Connection.
Lower gate drive output of Channel 2. Connect to gate of the low-side power N-Channel MOSFET.
Connect this pin to the SOURCE of the upper MOSFET and the DRAIN of the lower MOSFET in Channel 2. This
pin provides a return path for the upper gate drive.
Upper gate drive output of Channel 2. Connect to gate of high-side power N-Channel MOSFET.
Floating bootstrap supply pin for the upper gate drive of Channel 2. Connect the bootstrap capacitor between this
pin and the PHASE2 pin. The bootstrap capacitor provides the charge to turn on the upper MOSFET. See the
Internal Bootstrap Device section under DESCRIPTION for guidance in choosing the capacitor value.
Floating bootstrap supply pin for the upper gate drive of Channel 1. Connect the bootstrap capacitor between this
pin and the PHASE1 pin. The bootstrap capacitor provides the charge to turn on the upper MOSFET. See the
Internal Bootstrap Device section under DESCRIPTION for guidance in choosing the capacitor value.
Upper gate drive output of Channel 1. Connect to gate of high-side power N-Channel MOSFET.
Connect this pin to the SOURCE of the upper MOSFET and the DRAIN of the lower MOSFET in Channel 1. This
pin provides a return path for the upper gate drive.
Connect this pin to a +12V bias supply. It supplies power to internal analog circuits. Place a high quality low ESR
ceramic capacitor from this pin to GND.
Connect this pad to the power ground plane (GND) via thermally enhanced connection.
2
16
PWM2
3
4
5
6
-
7
8
9
10
1
2
3
4
5,8
6
7
9
10
GND
LGATE1
PVCC
PGND
N/C
LGATE2
PHASE2
UGATE2
BOOT2
11
11
BOOT1
12
13
14
-
12
13
14
17
UGATE1
PHASE1
VCC
PAD
7
FN9155.4
July 25, 2005