MM54HC242 MM74HC242 Inverting Quad TRI-STATE Transceiver
MM54HC243 MM74HC243 Quad TRI-STATE Transceiver
January 1988
MM54HC242 MM74HC242
Inverting Quad TRI-STATE Transceiver
MM54HC243 MM74HC243 Quad TRI-STATE Transceiver
General Description
These TRI-STATE bidirectional inverting and non-inverting
buffers utilize advanced silicon-gate CMOS technology and
are intended for two-way asynchronous communication be-
tween data buses They have high drive current outputs
which enable high speed operation when driving large bus
capacitances These circuits possess the low power dissi-
pation and high noise immunity associated with CMOS cir-
cuits but speeds comparable to low power Schottky TTL
circuits They can also drive 15 LS-TTL loads
The MM54HC243 MM74HC243 is a non-inverting buffer
and the MM54HC242 MM74HC242 is an inverting buffer
Each device has one active high enable (GBA) and one
active low enable (GAB) GBA enables the A outputs and
GAB enables the B outputs This device does not have
Schmitt trigger inputs
All inputs are protected from damage due to static dis-
charge by diodes to V
CC
and ground
Features
Y
Y
Y
Y
Y
Y
Typical propagation delay 12 ns
TRI-STATE outputs
Two way asynchronous communication
High output current 6 mA (74HC)
Wide power supply range 2 鈥?6V
Low quiescent supply current 80
mA
(74HC)
Connection Diagrams
Dual-In-Line Package
Dual-In-Line Package
TL L 5019 鈥?
TL L 5019 鈥?2
Top View
Order Number MM54HC242 or MM74HC242
Top View
Order Number MM54HC243 or MM74HC243
Truth Tables
鈥橦C242
Control Inputs
GAB
H
L
H
L
GBA
H
H
L
L
Data Port Status
A
OUTPUT
Isolated
Isolated
Input
B
Input
Isolated
Isolated
OUTPUT
Control Inputs
GAB
H
L
H
L
GBA
H
H
L
L
鈥橦C243
Data Port Status
A
OUTPUT
Isolated
Isolated
Input
B
Input
Isolated
Isolated
OUTPUT
TRI-STATE is a registered trademark of National Semiconductor Corp
C
1995 National Semiconductor Corporation
TL L 5019
RRD-B30M115 Printed in U S A
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