MM74HC221A Dual Non-Retriggerable Monostable Multivibrator
September 1983
Revised February 1999
MM74HC221A
Dual Non-Retriggerable Monostable Multivibrator
General Description
The MM74HC221A high speed monostable multivibrators
(one shots) utilize advanced silicon-gate CMOS technol-
ogy. They feature speeds comparable to low power Schot-
tky TTL circuitry while retaining the low power and high
noise immunity characteristic of CMOS circuits.
Each multivibrator features both a negative, A, and a posi-
tive, B, transition triggered input, either of which can be
used as an inhibit input. Also included is a clear input that
when taken low resets the one shot. The MM74HC221A
can be triggered on the positive transition of the clear while
A is held LOW and B is held HIGH.
The MM74HC221A is a non-retriggerable, and therefore
cannot be retriggered until the output pulse times out.
Pulse width stability over a wide range of temperature and
supply is achieved using linear CMOS techniques. The out-
put pulse equation is simply: PW
=
(R
EXT
) (C
EXT
); where
PW
is in seconds, R is in ohms, and C is in farads. All inputs
are protected from damage due to static discharge by
diodes to V
CC
and ground.
Features
s
Typical propagation delay: 40 ns
s
Wide power supply range: 2V鈥?V
s
Low quiescent current: 80
碌A
maximum (74HC Series)
s
Low input current: 1
碌A
maximum
s
Fanout of 10 LS-TTL loads
s
Simple pulse width formula T
=
RC
s
Wide pulse range: 400 ns to
鈭?/div>
(typ)
s
Part to part variation:
鹵5%
(typ)
s
Schmitt Trigger A & B inputs enable infinite signal input
rise or fall times
Ordering Code:
Order Number
MM74HC221AM
MM74HC221ASJ
MM74HC221AMTC
MM74HC221AN
Package Number
M16A
M16D
MTC16
N16E
Package Description
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150鈥?Narrow
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
16-Lead Plastic Dual-In-Line Package (PDIP), MS-001, 0.300鈥?Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter 鈥淴鈥?to the ordering code.
Connection Diagrams
Pin Assignments for DIP, SOIC, SOP and TSSOP
Timing Component
Top View
Note:
Pin 6 and Pin 14 must be hard-wired to GND.
漏 1999 Fairchild Semiconductor Corporation
DS005325.prf
www.fairchildsemi.com
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