19-2285; Rev 0; 1/02
Quad Differential LVECL-to-LVPECL Translators
General Description
The MAX9420鈥揗AX9423 are extremely fast, low-skew
quad LVECL-to-LVPECL translators designed for high-
speed signal and clock driver applications. The
devices feature ultra-low propagation delay of 336ps
and channel-to-channel skew of 17ps.
The four channels can be operated synchronously with
an external clock, or in asynchronous mode, deter-
mined by the state of the SEL input. An enable input
provides the ability to force all the outputs to a differen-
tial low state.
These devices operate with a negative supply voltage
of -2.0V to -3.6V, compatible with LVECL input signals.
The positive supply range is 2.375V to 3.6V for differen-
tial LVPECL output signals.
A variety of input and output terminations are offered for
maximum design flexibility. The MAX9420 has open
inputs and open-emitter outputs. The MAX9421 has
open inputs and 50鈩?series outputs. The MAX9422 has
100鈩?differential input impedance and open-emitter
outputs. The MAX9423 has 100鈩?differential input
impedance and 50鈩?series outputs.
The MAX9420鈥揗AX9423 are specified for operation
from -40擄C to +85擄C, and are offered in space-saving
32-pin 5mm
鉁?/div>
5mm TQFP and 32-lead 5mm
鉁?/div>
5mm
QFN packages.
Features
o
>500mV Differential Output at 3.0GHz Clock
o
336ps (typ) Propagation Delay in Asynchronous
Mode
o
17ps (typ) Channel-to-Channel Skew
o
Integrated 50鈩?Outputs (MAX9421/MAX9423)
o
Integrated 100鈩?Inputs (MAX9422/MAX9423)
o
Synchronous/Asynchronous Operation
MAX9420鈥揗AX9423
Ordering Information
PART
MAX9420EHJ
MAX9421EHJ
MAX9422EHJ
MAX9423EHJ
TEMP
RANGE
PIN-
DATA
OUTPUT
PACKAGE INPUT
Open
Open
Open
Open
100鈩?/div>
100鈩?/div>
100鈩?/div>
100鈩?/div>
Open
Open
50鈩?/div>
50鈩?/div>
Open
Open
50鈩?/div>
50鈩?/div>
-40擄C to +85擄C 32 TQFP
-40擄C to +85擄C 32 TQFP
-40擄C to +85擄C 32 TQFP
-40擄C to +85擄C 32 TQFP
MAX9420EGJ* -40擄C to +85擄C 32 QFN
MAX9421EGJ* -40擄C to +85擄C 32 QFN
MAX9422EGJ* -40擄C to +85擄C 32 QFN
MAX9423EGJ* -40擄C to +85擄C 32 QFN
Applications
Data and Clock Driver and Buffer
Central Office Backplane Clock Distribution
DSLAM Backplane
*Future
product鈥攃ontact factory for availability.
Pin Configurations
OUT0
GND
V
CC
IN0
IN0
IN1
26
32
V
EE
SEL
SEL
CLK
CLK
EN
EN
1
2
3
4
5
6
7
8
9
IN3
10
IN3
11
V
CC
12
OUT3
13
OUT3
14
GND
15
IN2
16
IN2
31
30
29
28
27
IN1
25
24 V
CC
23 OUT1
22 OUT1
21 GND
20 GND
19 OUT2
18 OUT2
17 V
CC
Base Station
ATE
TOP VIEW
MAX9420
MAX9421
MAX9422
MAX9423
Functional Diagram appears at end of data sheet.
V
EE
TQFP (5mm x 5mm)
Pin Configurations continued at end of data sheet.
________________________________________________________________
Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim鈥檚 website at www.maxim-ic.com.
OUT0
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