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M74HC155RM13TR Datasheet

  • M74HC155RM13TR

  • Logic IC; Logic Type:Decoder; Logic Family:74HC; Logic Base ...

  • 9頁

  • STMicroelectronics   STMicroelectronics

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M74HC155
DUAL 2 TO 4 LINE DECODER 3 TO 8 LINE DECODER
s
s
s
s
s
s
s
HIGH SPEED:
t
PD
= 13ns (TYP.) at V
CC
= 6V
LOW POWER DISSIPATION:
I
CC
= 4碌A(chǔ)(MAX.) at T
A
=25擄C
HIGH NOISE IMMUNITY:
V
NIH
= V
NIL
= 28 % V
CC
(MIN.)
SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
| = I
OL
= 4mA (MIN)
BALANCED PROPAGATION DELAYS:
t
PLH
鈮?/div>
t
PHL
WIDE OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 2V to 6V
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 155
DIP
SOP
TSSOP
ORDER CODES
PACKAGE
DIP
SOP
TSSOP
TUBE
M74HC155B1R
M74HC155M1R
T&R
M74HC155RM13TR
M74HC155TTR
DESCRIPTION
The M74HC155 is an high speed CMOS QUAD
2-INPUT NAND GATE fabricated with silicon gate
C
2
MOS technology.
It features dual 1 to 4 line demultiplexers with
individual strobe inputs (1G and 2G), individual
data inputs (1C and 2C) and common binary
address inputs (A and B).
When both decoders are enabled by the strobes,
the inverted output of 1C data and non-inverted
output of 2C data will be brought to the select
output pins of each sections. A 1 to 8 line
demultiplexer can also easily built up by providing
a data signal to both 1C and 2C inputs; the output
order from the msb is 1Y3, 1Y2, 1Y1, 1Y0, 2Y3,
2Y2, 2Y1, 2Y0. This device can be used as a 2 to
4 line decoder or a 3 to 8 line decoder when 1C is
held high and 2C is held low.
All inputs are equipped with protection circuits
against static discharge and transient excess
voltage.
PIN CONNECTION AND IEC LOGIC SYMBOLS
July 2001
1/9

M74HC155RM13TR 產(chǎn)品屬性

  • 1

  • 集成電路 (IC)

  • 邏輯 - 信號開關(guān)，多路復(fù)用器，解碼器

  • 74HC

  • 解碼器

  • 1 x 2:4

  • 2

  • 5.2mA，5.2mA

  • 單電源

  • 2 V ~ 6 V

  • -55°C ~ 125°C

  • 表面貼裝

  • 16-SOIC（0.154"，3.90mm 寬）

  • 16-SOP

  • Digi-Reel®

  • 497-1784-6

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