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K4F641612C-TC Datasheet

  • K4F641612C-TC

  • 4M x 16bit CMOS Dynamic RAM with Fast Page Mode

  • 35頁

  • SAMSUNG   SAMSUNG

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K4F661612C, K4F641612C
CMOS DRAM
4M x 16bit CMOS Dynamic RAM with Fast Page Mode
DESCRIPTION
This is a family of 4,194,304 x 16 bit Fast Page Mode CMOS DRAMs. Fast Page Mode offers high speed random access of memory
cells within the same row. Refresh cycle(4K Ref. or 8K Ref.), access time (-45, -50 or -60), power consumption(Normal or Low power)
are optional features of this family. All of this family have CAS-before-RAS refresh, RAS-only refresh and Hidden refresh capabilities.
Furthermore, Self-refresh operation is available in L-version. This 4Mx16 Fast Page Mode DRAM family is fabricated using Samsung鈥瞫
advanced CMOS process to realize high band-width, low power consumption and high reliability.
FEATURES
鈥?Part Identification
- K4F661612C-TC/L(3.3V, 8K Ref.)
- K4F641612C-TC/L(3.3V, 4K Ref.)
鈥?Fast Page Mode operation
鈥?2CAS Byte/Word Read/Write operation
鈥?CAS-before-RAS refresh capability
鈥?RAS-only and Hidden refresh capability
鈥?Self-refresh capability (L-ver only)
鈥?Fast parallel test mode capability
鈥?/div>
Active Power Dissipation
Unit : mW
Speed
-45
-50
-60
8K
324
288
252
4K
468
432
396
鈥?LVTTL(3.3V) compatible inputs and outputs
鈥?Early Write or output enable controlled write
鈥?JEDEC Standard pinout
鈥?Available in Plastic TSOP(II) packages
鈥?+3.3V鹵0.3V power supply
鈥?/div>
Refresh Cycles
Part
NO.
K4F661612C*
K4F641612C
Refresh
cycle
8K
4K
Refresh time
Normal
64ms
L-ver
128ms
RAS
UCAS
LCAS
W
Control
Clocks
Vcc
Vss
Lower
Data in
Buffer
Sense Amps & I/O
Lower
Data out
Buffer
Upper
Data in
Buffer
Upper
Data out
Buffer
FUNCTIONAL BLOCK DIAGRAM
VBB Generator
* Access mode & RAS only refresh mode
: 8K cycle/64ms(Normal), 8K cycle/128ms(L-ver.)
CAS-before-RAS & Hidden refresh mode
: 4K cycle/64ms(Normal), 4K cycle/128ms(L-ver.)
Refresh Timer
Refresh Control
Refresh Counter
Row Decoder
DQ0
to
DQ7
鈥?/div>
Performance Range
Speed
-45
-50
-60
Memory Array
4,194,304 x 16
Cells
OE
DQ8
to
DQ15
t
RAC
45ns
50ns
60ns
t
CAC
12ns
13ns
15ns
t
RC
80ns
90ns
110ns
t
PC
31ns
35ns
40ns
A0~A12
(A0~A11)*1
A0~A8
(A0~A9)*1
Row Address Buffer
Col. Address Buffer
Column Decoder
Note) *1 : 4K Refresh
SAMSUNG ELECTRONICS CO., LTD.
reserves the right to
change products and specifications without notice.

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