最新免费av在线观看,亚洲综合一区成人在线,中文字幕精品无码一区二区三区,中文人妻av高清一区二区,中文字幕乱偷无码av先锋

K4F171611D Datasheet

  • K4F171611D

  • 1M x 16Bit CMOS Dynamic RAM with Fast Page Mode

  • 526.66KB

  • 34頁

  • SAMSUNG   SAMSUNG

掃碼查看芯片數(shù)據(jù)手冊

上傳產(chǎn)品規(guī)格書

PDF預(yù)覽

K4F171611D, K4F151611D
K4F171612D, K4F151612D
CMOS DRAM
1M x 16Bit CMOS Dynamic RAM with Fast Page Mode
DESCRIPTION
This is a family of 1,048,576 x 16 bit Fast Page Mode CMOS DRAMs. Fast Page Mode offers high speed random access of memory
cells within the same row. Power supply voltage (+5.0V or +3.3V), refresh cycle (1K Ref. or 4K Ref.), access time (-50 or -60), power
consumption(Normal or Low power) and package type(SOJ or TSOP-II) are optional features of this family. All of this family have CAS-
before-RAS refresh, RAS-only refresh and Hidden refresh capabilities. Furthermore, Self-refresh operation is available in L-version. This
1Mx16 Fast Page Mode DRAM family is fabricated using Samsung鈥瞫 advanced CMOS process to realize high band-width, low power
consumption and high reliability. It may be used as graphic memory unit for microcomputer, personal computer and portable machines.
FEATURES
鈥?Part Identification
- K4F171611D-J(T) (5V, 4K Ref.)
- K4F151611D-J(T) (5V, 1K Ref.)
- K4F171612D-J(T) (3.3V, 4K Ref.)
- K4F151612D-J(T) (3.3V, 1K Ref.)
鈥?/div>
Active Power Dissipation
Unit : mW
Speed
4K
-50
-60
324
288
3.3V
1K
504
468
4K
495
440
5V
1K
770
715
鈥?Fast Page Mode operation
鈥?2 CAS Byte/Word Read/Write operation
鈥?CAS-before-RAS refresh capability
鈥?RAS-only and Hidden refresh capability
鈥?Self-refresh capability (L-ver only)
鈥?TTL(5V)/LVTTL(3.3V) compatible inputs and outputs
鈥?Early Write or output enable controlled write
鈥?JEDEC Standard pinout
鈥?Available in 42-pin SOJ 400mil and 50(44)-pin TSOP(II)
400mil packages
鈥?Single +5V鹵10% power supply (5V product)
鈥?Single +3.3V鹵0.3V power supply (3.3V product)
鈥?/div>
Refresh Cycles
Part
NO.
K4F171611D
K4F171612D
K4F151611D
K4F151612D
V
CC
5V
3.3V
5V
3.3V
1K
16ms
Refresh
cycle
4K
Refresh period
Normal
64ms
128ms
L-ver
RAS
UCAS
LCAS
W
FUNCTIONAL BLOCK DIAGRAM
Control
Clocks
Vcc
Vss
Lower
Data in
Buffer
Sense Amps & I/O
Lower
Data out
Buffer
Upper
Data in
Buffer
Upper
Data out
Buffer
VBB Generator
Refresh Timer
Refresh Control
Refresh Counter
Row Decoder
DQ0
to
DQ7
鈥?/div>
Perfomance Range
Speed
-50
-60
Memory Array
1,048,576 x16
Cells
OE
t
RAC
50ns
60ns
t
CAC
15ns
15ns
t
RC
90ns
110ns
t
PC
35ns
40ns
Remark
5V/3.3V
5V/3.3V
A0-A11
(A0 - A9)
*1
A0 - A7
(A0 - A9)
*1
Row Address Buffer
Col. Address Buffer
Column Decoder
DQ8
to
DQ15
Note)
*1
: 1K Refresh
SAMSUNG ELECTRONICS CO., LTD.
reserves the right to
change products and specifications without notice.

K4F171611D相關(guān)型號PDF文件下載

掃碼下載APP，
一鍵連接廣大的電子世界。

在線人工客服

買家服務(wù)：
賣家服務(wù)：
技術(shù)客服：

0571-85317607

網(wǎng)站技術(shù)支持

13606545031

客服在線時間周一至周五
9:00-17:30

關(guān)注官方微信號，
第一時間獲取資訊。

建議反饋

聯(lián)系人：

聯(lián)系方式：

按住滑塊，拖拽到最右邊
>>
感謝您向阿庫提出的寶貴意見，您的參與是維庫提升服務(wù)的動力！意見一經(jīng)采納，將有感恩紅包奉上哦！