廬
HIGH-PERFORMANCE
CMOS BUS INTERFACE
REGISTERS
DESCRIPTION:
Integrated Device Technology, Inc.
IDT54/74FCT821A/B/C
IDT54/74FCT823A/B/C
IDT54/74FCT824A/B/C
IDT54/74FCT825A/B/C
FEATURES:
鈥?Equivalent to AMD鈥檚 Am29821-25 bipolar registers in
pinout/function, speed and output drive over full tem-
perature and voltage supply extremes
鈥?IDT54/74FCT821A/823A/824A/825A equivalent to
FAST鈩?speed
鈥?IDT54/74FCT821B/823B/824B/825B 25% faster than
FAST
鈥?IDT54/74FCT821C/823C/824C/825C 40% faster than
FAST
鈥?Buffered common Clock Enable (
EN
) and asynchronous
Clear input (
CLR
)
鈥?I
OL
= 48mA (commercial) and 32mA (military)
鈥?Clamp diodes on all inputs for ringing suppression
鈥?CMOS power levels (1mW typ. static)
鈥?TTL input and output compatibility
鈥?CMOS output level compatible
鈥?Substantially lower input current levels than AMD鈥檚
bipolar Am29800 series (5碌A(chǔ) max.)
鈥?Product available in Radiation Tolerant and Radiation
Enhanced versions
鈥?Military product compliant to MIL-STD-883, Class B
The IDT54/74FCT800 series is built using an advanced
dual metal CMOS technology.
The IDT54/74FCT820 series bus interface registers are
designed to eliminate the extra packages required to buffer
existing registers and provide extra data width for wider
address/data paths or buses carrying parity. The IDT54/
74FCT821 are buffered, 10-bit wide versions of the popular
鈥?74 function. The IDT54/74FCT823 and IDT54/74FCT824
are 9-bit wide buffered registers with Clock Enable (
EN
) and
Clear (
CLR
) 鈥?ideal for parity bus interfacing in high-perform-
ance microprogrammed systems. The IDT54/74FCT825 are
8-bit buffered registers with all the 鈥?23 controls plus multiple
enables (
OE
1
,
OE
2
,
OE
3
) to allow multiuser control of the
interface, e.g.,
CS
, DMA and RD/
WR
. They are ideal for use
as an output port requiring HIGH I
OL
/I
OH
.
All of the IDT54/74FCT800 high-performance interface
family are designed for high-capacitance load drive capability,
while providing low-capacitance bus loading at both inputs
and outputs. All inputs have clamp diodes and all outputs are
designed for low-capacitance bus loading in high-impedance
state.
FUNCTIONAL BLOCK DIAGRAMS
IDT54/74FCT821/823/825
D
0
EN
D
N
IDT54/74FCT824
D
0
EN
D
N
CLR
D
CL
Q
D
CL
Q
CLR
D
CL
Q
D
CL
Q
CP Q
CP Q
CP Q
CP Q
CP
CP
OE
Y
0
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
FAST is a trademark of National Semiconductor Co.
OE
Y
N
2608 cnv* 01
Y
0
Y
N
2608 cnv* 02
MILITARY AND COMMERCIAL TEMPERATURE RANGES
漏1992
Integrated Device Technology, Inc.
MAY 1992
DSC-4618/2
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