前輩們可以幫我看看這個(gè)網(wǎng)表哪里錯(cuò)了嗎？

作者：loveintnt　欄目：IC設(shè)計(jì)

前輩們可以幫我看看這個(gè)網(wǎng)表哪里錯(cuò)了嗎？
模擬報(bào)錯(cuò)是：好像是子電子里沒有XX到地的通路。不知道問題在哪
網(wǎng)表
simulation of TFT
.SUBCKT UNIT 1 5 6 7 8 9
M1 1 1 3 0 NMOS
M2 3 2 0 0 NMOS
M3 4 6 0 0 NMOS
M4 1 3 4 0 NMOS
M5 4 2 0 0 NMOS
M6 2 4 0 0 NMOS
M7 2 9 0 0 NMOS
M8 1 6 2 0 NMOS
M9 5 4 0 0 NMOS
M10 8 2 5 0 NMOS
M11 7 4 0 0 NMOS
M12 8 2 7 0 NMOS
.ENDS
V2 2 0 DC=5v
V3 3 0 PULSE (0 5 0ns 0ns 0ns 50ns 100ns)
V4 4 0 PULSE (5 0 0ns 0ns 0ns 50ns 100ns)
V5 5 0 PULSE (5 0 0ns 0ns 0ns 50ns 200ns)
XUNIT1 2 9 1 5 3 10 UNIT
XUNIT2 2 10 9 6 4 11 UNIT
XUNIT3 2 11 10 7 3 12 UNIT
XUNIT4 2 12 11 8 4 1 UNIT
.LIB E:\Hspice_2006.3\license.dat.bak
.TRAN 0ns 400ns 0ns
.PLOT TRAN V(5) V(6) V(7) V(8)
.PROBE V(5) V(6) V(7) V(8)
end

下面是給的報(bào)錯(cuò)：
Init: read INSTALL configuration file: D:\Study_SoftWare\Hspice2006\meta.cfg
******  HSPICE   Y-2006.03-SP1 32-BIT (May 24 2006) 13:32:58 04/13/2007 pcnt
  COPYRIGHT (C) 2006 Synopsys, Inc. All Rights Reserved.
  Unpublished-rights reserved under US COPYRIGHT laws.
  This program is protected by law and is subject to the
  terms and conditions of the license agreement found in:
    D:\Study_SoftWare\Hspice2006\license.txt
  Use of this program is your acceptance to be bound by this
  license agreement. HSPICE is the trademark of Synopsys, Inc.
  Input File: c:\documents and settings\me\桌面\復(fù)件 simulation.sp
  lic:
  lic: FLEXlm: v8.4b
  lic: USER:   ME                   HOSTNAME: me-2005
  lic: HOSTID: 00e05c013e14         PID:      1564
  lic: Using FLEXlm license file:
  lic: D:\Study_SoftWare\Hspice2006\license.dat
  lic: Checkout hspice;  Encryption code: BDA41F596944304D0130
  lic: License/Maintenance for hspice will expire on 1-jan-0/2006.03
  lic: NODE LOCKED DEMO license on host 00e05c013e14
  lic:
Init: read INSTALL configuration file: D:\Study_SoftWare\Hspice2006\meta.cfg
Init: hspice initialization file: D:\Study_SoftWare\Hspice2006\hspice.ini
* hspice.ini
*
* use ascii ONLY for initial pc hspice release
*
.option post = 2
.subckt unit 5 6 7 8 9
m1 1 1 3  nmos
m2 3 2 0  nmos
m3 4 6 0  nmos
m4 1 3 4  nmos
m5 4 2 0  nmos
m6 2 4 0  nmos
m7 2 9 0  nmos
m8 1 6 2  nmos
m9 5 4 0  nmos
m10 8 2 5 nmos
m11 7 4 0 nmos
m12 8 2 7 nmos
v1 1 0 5v
.ends

v3 3 0 PULSE (0 5 0.0001ns 0.0001ns 0.0001ns 50ns 100ns)
v4 4 0 PULSE (5 0 0.0001ns 0.0001ns 0.0001ns 50ns 100ns)
v5 5 0 PULSE (5 0 0.0001ns 0.0001ns 0.0001ns 50ns 200ns)
xunit1 9 1 5 3 10 unit
xunit2 10 9 6 4 11 unit
xunit3 11 10 7 3 12 unit
xunit4 12 11 8 4 1 unit
.inc  'g:\csmc06.lib'
****the newest MODELb..receive date:29/11,2001
* csmc 0.6u spice MODEL of bsim3v3-dpdm CT02 PROCESS
* when using spectre of cadence, please change level from 49 to 11.
* when using pspice of microsim, please change level from 49 to 7.
* when encounting problems, please mail to zhangxs@csmc-hj.com.cn
*MODEL = bsim3
*newMODEL =   3
*metasoftware compatibility mode
*these are bsim3v3 MODEL parameters.

*
*lotNAME=mix dpdm userNAME=user date=09-18-2001
* lmin=0.6 lmax=20 wmin=0.8 wmax=20
.MODEL nmos nmos
+level= 49
*
* general parameters
*
+lmin=0.6e-6 lmax=2e-5 wmin=0.8e-6 wmax=2e-5
+tref=25.0
+version =3.0
+tox= 1.25e-08
+xj= 2.5000000e-07
+nch= 1.2720520e+17
+lln= 1.0295000
+lwn= 1.0000000
+wln= 0.9340000
+wwn= 2.0000000
+lint= 1.5200000e-07
+ll= -3.5900000e-14
+lw= 0.00
+lwl= 0.00
+wint= 2.0200000e-07
+wl= -9.4300000e-14
+ww= -5.1700000e-20
+wwl= 0.00
+mobmod=  1
+binunit= 2
+xl= 0.00
+xw= 0.00
+lmlt=  1
+wmlt=  1
+binflag=  0
+dwg= -2.2914280e-08
+dwb= 1.3746710e-08
* DIODE parameters
+acm= 2
+ldif=0.00
+hdif=0.00
+rsh= 0
+rd= 0
+rs= 0
+rsc= 0
+rdc= 0
*
* threshold voltage parameters
*
+vth0= 0.7278545
+k1= 0.7409649
+k2= -1.5283380e-02
+k3= 7.1778210
+dvt0= 14.8549000
+dvt1= 1.0209540
+dvt2= -4.6828460e-02
+dvt0w= -8.0227880e-02
+dvt1w= 8.8635700e+04
+dvt2w= 0.1900000
+nlx= 0.00
+w0= 1.3573220e-06
+k3b= -4.7786870
+ngate= 1.0000000e+30
*
* mobility parameters
*
+vsat= 7.7711460e+04
+ua= -7.4628200e-10
+ub= 2.6335220e-18
+uc= 3.5986350e-11
+rdsw= 1.8026500e+03
+prwb= 1.9065101e-02
+prwg= -3.4200580e-02
+wr= 0.9613520
+u0= 4.2603870e-02
+a0= 0.4940039
+keta= -1.6965831e-02
+a1= 0.00
+a2= 0.9900000
+ags= 1.9959440e-02
+b0= 8.6096910e-08
+b1= -4.3232750e-07
*
* subthreshold current parameters
*
+voff= -9.6102280e-02
+nfactor= 1.0989590
+cit= 2.3121500e-04
+cdsc= 4.8599650e-03
+cdscb= 9.1149930e-04
+cdscd= 0.00
+eta0= 6.2591110e-03
+etab= -1.1673500e-02
+dsub= 0.2718996
*
* rout parameters
*
+pclm= 0.6415634
+pdiblc1= 9.6421800e-03
+pdiblc2= 1.5307820e-03
+pdiblcb= -0.1822976
+drout= 0.1000000
+pscbe1= 2.7371760e+08
+pscbe2= 4.6373430e-06
+pvag= 0.00
+delta= 1.0000000e-02
+alpha0= 0.00
+beta0= 30.0000000
*
* temperature effects parameters
*
+kt1= -0.3333333
+kt2= -2.693e-02
+at= 1.200e+04
+ute= -1.6455
+ua1= 1.113e-09
+ub1= -1.046e-18
+uc1= -6.622e-12
+kt1l= 0.00
+prt= 8.480e+02
*
* capacitance parameters
*
+cj= 4.350548e-04
+mj= .4223898
+pb= .9590048
+cjsw= 3.648853e-10
+mjsw= .1671139
+php= .5406927
+cta= 0
+ctp= 0
+pta= 0
+ptp= 0
+js=1.00e-14
+jsw=0.00
+n=1.0
+xti=3.0
+cgdo=2.0e-10
+cgso=2.0e-10
+cgbo=1.0e-13
+capmod= 2
+nqsmod= 0
+elm= 5
+xpart= 0
+cgsl= 2.0000000e-10
+cgdl= 2.0000000e-10
+ckappa= 1.9920000
+cf= 0.00
+clc= 8.0259140e-09
+cle= 2.0475841
+dlc= 1.5184e-07
+dwc= 2.015e-07
*

**warning** MODEL nmos
DEVICE geometries will not be checked against the limits set by
lmin, lmax, wmin and wmax. To enable this check, add a period(.)
to the MODEL NAME(i.e. enable MODEL selector).

.MODEL pmos pmos
+level= 49
*
* general parameters
*
+lmin=0.6e-6 lmax=2e-5 wmin=0.8e-6 wmax=2e-5
+tref=25.0
+version =3.1
+tox= 1.30e-08
+xj= 3.0000001e-07
+nch= 2.5099999e+16
+lln= 0.2000000
+lwn= 1.0000000
+wln= 1.0660000
+wwn= 2.0000000
+lint= -1.3000000e-09
+ll= -1.3500000e-10
+lw= 0.00
+lwl= 1.4900000e-15
+wint= 2.3999999e-07
+wl= 5.5000000e-15
+ww= -8.2200000e-20
+wwl= 0.00
+mobmod=  1
+binunit= 2
+xl= 0.00
+xw= 0.00
+lmlt=  1
+wmlt=  1
+bin

2樓：	>>參與討論
作者： cjawcc1022 于 2007/4/16 11:57:00 發(fā)布： 0節(jié)點(diǎn) 你看看是不是因?yàn)槟銢]有定義ground。

3樓：	>>參與討論
作者： delei 于 2007/4/18 20:30:00 發(fā)布：節(jié)點(diǎn)1上沒加到地的電源呀節(jié)點(diǎn)1上沒加到地的電源呀

4樓：	>>參與討論
作者： asunmad 于 2007/4/21 6:32:00 發(fā)布：節(jié)點(diǎn)1就連了及個(gè)MOS管的柵，沒有到地的通路

參與討論

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前輩們可以幫我看看這個(gè)網(wǎng)表哪里錯(cuò)了嗎？

前輩們可以幫我看看這個(gè)網(wǎng)表哪里錯(cuò)了嗎？