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D17133CS Datasheet

  • D17133CS

  • 4-BIT SINGLE-CHIP MICROCONTROLLER

  • 1138.87KB

  • 289頁

  • NEC   NEC

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CHAPTER 7
SYSTEM REGISTER (SYSREG)
Example 3. General register is in row address 0
R00B
M034
MEM
MEM
MOV
MOV
0.0BH
0.34H
R00B, #0EH
M034, @R00B
; R00B
鈫?/div>
0EH
; Indirect transfer of data in the register
As shown in Figure 7-9, when the above instructions are executed, the contents of data
memory stored at address 3EH is transferred to data memory location M034.
In other words, the MOV m, @r instruction causes the contents of the data memory location
specified by @r (which by definition has the same row address as m) to be transferred to the
data memory location specified by m.
The indirect data transfer address has the same row address as m (example above uses row
address is 3) and the column address is the value contained in the general register address
specified by r (example above uses column address 0EH). Therefore the address in the above
example is 3EH.
The data transfer memory address source and destination in this example are the opposite
of those shown in
Example 2
(source and destination are switched).
Figure 7-9. Example of Operation When MPE=0 and IXE=0
Column address
0
0
1
Row address
2
3
4
5
6
7
Example 1. ADD R003, M061
Example 3. MOV M034, @R00B
1
2
3
4
5
8
Column address specified
as transfer destination
Example 2. MOV @R005, M034
6
7
8
9
A
B
E
Column address specified
as transfer source
C
D
E
F
General
register
System register
Addresses in Example 1
ADD R003, M061
Addresses in Example 2
MOV @R005, M034
Bank
Data memory address M
General register address R
0000
0000
Row
Column
Address Address
110
000
0001
0011
Data memory address M
General register address R
Indirect transfer address @R
Bank
0000
0000
0000
Row
Column
Address Address
011
000
011
0100
0101
1000
Contents
of R
Same as M
51

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