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D17133CS Datasheet

  • D17133CS

  • 4-BIT SINGLE-CHIP MICROCONTROLLER

  • 1138.87KB

  • 289頁

  • NEC   NEC

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LIST OF FIGURES (1/2)
Figure No.
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Program Counter ...................................................................................................................
Value of the Program Counter after an Instruction Is Executed ............................................
Value in the Program Counter after Reset .............................................................................
Value in the Program Counter during Execution of a Direct Branch Instruction ....................
Value in the Program Counter during Execution of an Indirect Branch Instruction ................
Value in the Program Counter during Execution of a Direct Subroutine Call .........................
Value in the Program Counter during Execution of an Indirect Subroutine Call .....................
Value in the Program Counter during Execution of a Return Instruction ...............................
Program Memory Map for the
碌
PD17120 Subseries ............................................................
Direct Subroutine Call (CALL addr) ........................................................................................
Table Reference (MOVT DBF, @AR) .....................................................................................
Configuration of Data Memory ..............................................................................................
System Register Configuration ..............................................................................................
Data Buffer Configuration ......................................................................................................
General Register (GR) Configuration .....................................................................................
Port Register Configuration ...................................................................................................
Stack Configuration ................................................................................................................
Allocation of System Register in Data Memory .....................................................................
System Register Configuration ..............................................................................................
Address Register Configuration .............................................................................................
Address Register Used as a Peripheral Register ...................................................................
Window Register Configuration .............................................................................................
Bank Register Configuration ..................................................................................................
Index Register and Memory Pointer Configuration ...............................................................
Data Memory Address Modification by Index Register and Memory Pointer .......................
Example of Operation When MPE=0 and IXE=0 ...................................................................
Example of Operation When MPE=1 and IXE=0 ...................................................................
Example of Operation When MPE=0 and IXE=1 ...................................................................
Example of Operation When MPE=0 and IXE=1 ...................................................................
Example of Operation When MPE=0 and IXE=1 (Array Processing) .....................................
General Register Pointer Configuration .................................................................................
General Register Configuration ..............................................................................................
Program Status Word Configuration ......................................................................................
Outline of Functions of the Program Status Word ................................................................
General Register Configuration ..............................................................................................
Register File Configuration ....................................................................................................
Relationship Between the Register File and Data Memory ...................................................
Accessing the Register File Using the PEEK and POKE Instructions ....................................
Allocation of the Data Buffer .................................................................................................
Data Buffer Configuration ......................................................................................................
Relationship Between the Data Buffer and Peripheral Hardware ..........................................
Configuration of the ALU .......................................................................................................
Changes in port register due to execution of the CLR1 P0E1 instruction .............................
Input/Output Switching by Group I/O ....................................................................................
Bit I/O Port Control Register ..................................................................................................
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