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TYN812RG Datasheet

  • TYN812RG

  • SENSITIVE & STANDARD(12A SCRs)

  • 125.22KB

  • 11頁

  • STMICROELECTRONICS   STMICROELECTRONICS

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上傳產(chǎn)品規(guī)格書

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TN12, TS12 and TYNx12 Series
Figure 3: Average and D.C. on-state current
versus ambient temperature (device mounted
on FR4 with recommended pad layout) (DPAK)
I
T(AV)
(A)
3.0
2.5
D.C.
Figure 4: Relative variation of thermal
impedance junction to case versus pulse
duration
K=[Z
th(j-c)
/R
th(j-c)
]
1.0
2.0
1.5
偽
= 180擄
D
2
PAK
0.5
1.0
0.5
DPAK
0.2
T
amb
(擄C)
0.0
0
25
50
75
100
125
t
p
(s)
0.1
1E-3
1E-2
1E-1
1E+0
Figure 5: Relative variation of thermal
impedance junction to ambient versus pulse
duration (recommended pad layout, FR4 PC
board for DPAK)
K=[Z
th(j-a)
/R
th(j-a)
]
1.00
Figure 6: Relative variation of gate trigger
current and holding current versus junction
temperature for TS8 series
I
GT
,I
H
,I
L
[T
j
] / I
GT
,I
H
,I
L
[T
j
=25擄C]
2.0
1.8
1.6
DPAK
I
GT
1.4
D
2
PAK
1.2
TO-220AB / IPAK
0.10
1.0
0.8
0.6
0.4
I
H
& I
L
R
GK
= 1k
鈩?/div>
t
p
(s)
0.01
1E-2
1E-1
1E+0
1E+1
1E+2
5E+2
0.2
0.0
-40
-20
0
20
T
j
(擄C)
40
60
80
100
120
140
Figure 7: Relative variation of gate trigger
current and holding current versus junction
temperature for TN8 & TYN08 series
I
GT
,I
H
,I
L
[T
j
] / I
GT
,I
H
,I
L
[T
j
=25擄C]
2.4
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
-40
-20
0
20
40
60
80
100
120
140
I
H
& I
L
I
GT
Figure 8: Relative variation of holding current
versus gate-cathode resistance (typical
values) for TS8 series
I
H
[R
GK
] / I
H
[R
GK
=1k
鈩?/div>
]
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
T
j
= 25擄C
T
j
(擄C)
0.5
0.0
1E-2
1E-1
R
GK
(k
鈩?/div>
)
1E+0
1E+1
4/11

TYN812RG 產(chǎn)品屬性

  • TYN812 View All Specifications

  • 50

  • 分離式半導(dǎo)體產(chǎn)品

  • SCR - 單個

  • -

  • 標準恢復(fù)型

  • 800V

  • 1.3V

  • 1.6V

  • 8A

  • 12A

  • 15mA

  • 30mA

  • 5µA

  • 140A，145A

  • -40°C ~ 125°C

  • 通孔

  • TO-220-3

  • TO-220AB

  • 管件

  • 497-4490-5

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