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F29C51004 Datasheet

  • F29C51004

  • The F29C51004T/F29C51004B is a high speed 524,288 x 8 bit CM...

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  • ETC

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SyncMOS
Table 2. Command Codes
First Bus
Program Cycle
Command
Sequence
Read
Read
Autoselect
Mode
Byte
Program
Chip Erase
Address
XXXXH
5555H
5555H
Data
F0H
AAH
AAH
2AAAH
2AAAH
55H
55H
5555H
5555H
F0H
90H
RA(1)
Second Bus
Program Cycle
Address
Data
Third Bus
Program Cycle
Address
Data
Fourth Bus
Program Cycle
Address
Data
F29C51004T/F29C51004B
Fifth Bus
Program Cycle
Address
Data
Six Bus
Program Cycle
Address
Data
RD(2)
See table 3 for detail.
5555H
AAH
2AAAH
55H
5555H
A0H
PA
PD(4)
5555H
AAH
AAH
2AAAH
2AAAH
55H
55H
5555H
5555H
80H
80H
5555H
5555H
AAH
AAH
2AAAH
2AAAH
55H
55H
5555H
SA(5)
10H
30H
Sector Erase 5555H
NOTES:
1. RA: Read Address
2. RD: Read Data
3. PA: The address of the memory location to be programmed.
4. PD: The data at the byte address to be programmed.
5. SA(5): Sector Address
Chip Erase Cycle
The F29C51004T/F29C51004B features a chip-
erase operation. The chip erase operation is
initiated by using a specific six-bus-cycle
sequence: two unlock program cycles, a setup
command, two additional unlock program cycles,
and the chip erase command (see Table 2).
The automatic erase begins on the rising edge of
the last WE or CE pulse in the command sequence
and terminates when the data on DQ7 is 鈥?鈥?
Toggle Bit (I/O
6
)
The F29C51004T/F29C51004B also features
another method for determining the end of a
program cycle. When the device is in the program
cycle, any attempt to read the device will result in
l/O
6
toggling between 1 and 0. Once the program is
completed, the toggling will stop. The device is then
ready for the next operation. Examining the toggle
bit may begin at any time during a program cycle.
Boot Block Protection Enabling/Disabling
The F29C51004T/F29C51004B features
hardware Boot Block Protection. The boot block
sector protection is enabled when high voltage
(12.5V) is applied to OE and A9 pins with CE pin
LOW and WE pin LOW. The sector protection is
disabled when high voltage is applied to OE, CE
and A9 pins with WE pin LOW. Other pins can be
HIGH or LOW. This is shown in table 1.
Program Cycle Status Detection
There are two methods for determining the state
of the F29C51004T/F29C51004B during a
program (erase/write) cycle: DATA Polling (I/O
7
)
and Toggle Bit (I/O
6
).
DATA Polling (I/O
7
)
The F29C51004T/F29C51004B features DATA
polling to indicate the end of a program cycle.
When the device is in the program cycle, any
attempt to read the device will received the
complement of the loaded data on I/O
7
. Once the
program cycle is completed, I/O
7
will show true
data, and the device is then ready for the next
cycle.
Autoselect Mode
The F29C51004T/F29C51004B features an
Autoselect mode to identify boot block locking
status, device ID and manufacturer ID.
Entering Autoselect mode is accomplished by
applying a high voltage (VH) to the A9 Pin, or
through a sequence of commands (as shown in
table 2). Device will exit this mode once high
voltage on A9 is removed or another command is
loaded into the device.
F29C51004T/F29C51004B
V1.0
November 1998
10

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