128Mb DDR SDRAM
3.3.14 Power down
The power down mode is entered when CKE is low and exited when CKE is high. Once the power down
mode is initiated, all of the receiver circuits except clock, CKE and DLL circuit tree are gated off to reduce
power consumption. All banks should be in idle state prior to entering the precharge power down mode and
CKE should be set high at least 1tck+tIS prior to row active command . During power down mode, refresh
operations cannot be performed, therefore the device cannot be remained in power down mode longer than
the refresh period(Data retension time) of the device.
CK
CK
鈭?/div>
Command
Precharge
Precharge
power
down
Entry
Active
Active
power
down
Entry
鈭?/div>
鈭?/div>
Active
power
down
Exit
鈭?/div>
鈭?/div>
鈭?/div>
鈭?/div>
Read
Figure 23. Power down entry and exit timing
鈭?/div>
- 32 -
REV. 1.0 November. 2. 2000
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