128Mb DDR SDRAM
List of tables
Table 1 : Operating frequency and DLL jitter
Table 2. : Column address configurtion
Table 3 : Input/Output function description
Table 4 : Burst address ordering for burst length
Table 5 : Bank selection for precharge by bank address bits
Table 6 : Operating description when new command asserted while
read with auto precharge is issued
Table 7 : Operating description when new command asserted while
write with auto precharge is issued
Table 8 : Command truth table
Table 9-1 : Functional truth table
Table 9-2 : Functional truth table (contiued)
Table 9-3 : Functional truth table (contiued)
Table 9-4 : Functional truth table (contiued)
Table 9-5 : Functional truth table (cotinued)
Table 10 : Absolute maximum raings
Table 11 : DC operating condtion
Table 12 : DC specification
Table 13 : AC operating condition
Table 14 : AC timing parameters and specifications
Table 15 : AC operating test conditions
Table 16 : Input/Output capacitance
Table 17 : Pull down and pull up current values
10
11
12
17
19
30
31
34
35
36
37
38
39
40
40
42
42
44
45
45
47
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REV. 1.0 November. 2. 2000