128Mb DDR SDRAM
Current State
SELF-
REFRESHING
*8
CKE
n-1
L
L
L
L
L
L
CKE
n
H
H
H
H
H
L
H
L
H
L
L
L
L
L
L
X
H
CS
H
L
L
L
L
X
X
X
X
L
H
L
L
L
L
X
X
RAS
X
H
H
H
L
X
X
X
X
L
X
H
H
H
L
X
X
CAS
X
H
H
L
X
X
X
X
X
L
X
H
H
L
X
X
X
WE
X
H
L
X
X
X
X
X
X
H
X
H
L
X
X
X
X
Add
X
X
X
Action
Exit Self-Refresh
Exit Self-Refresh
ILLEGAL
ILLEGAL
ILLEGAL
NOPeration(Maintain Self-Refresh)
Exit Power Down(Idle after
t
PDEX
)
NOPeration(Maintain Power Down)
Refer to Function True Table
Enter Self-Refresh
Enter Power Down
Enter Power Down
ILLEGAL
ILLEGAL
ILLEGAL
Refer to Current State=Power Down
Refer to Function Truth Table
X
X
X
X
X
X
X
X
X
X
X
X
X
X
POWER
DOWN
ALL BANKS
IDLE
*9
L
L
H
H
H
H
H
H
H
L
ANY STATE
other than
listed above
H
Table 9-5. Functional truth table
ABBREVIATIONS :
H=High Level, L=Low level, X=Don鈥瞭 Care
Note :
1. All entries assume that CKE was High during the preceding clock cycle and the current clock cycle.
2. ILLEGAL to bank in specified state ; function may be legal in the bank indicated by BA, depending on the state of that bank.
3. Must satisfy bus contention, bus turn around and write recovery requirements.
4. NOP to bank precharging or in idle sate. May precharge bank indicated by BA.
5. ILLEGAL if any bank is not idle.
6. Refer to "3.3.11 Read with Auto Precharge" in page 29 for detailed information.
7. Refer to "3.3.12 Write with Auto Precharge" in page 30 for detailed information.
8. CKE Low to High transition will re-enable CK, CK and other inputs asynchronously. A minimum setup time must be satisfied
before issuing any command other than EXIT.
9. Power-Down and Self-Refresh can be entered only from All Bank Idle state.
ILLEGAL = Device operation and/or data integrity are not guaranteed.
- 38 -
REV. 1.0 November. 2. 2000