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RV5C338A-E2 Datasheet

  • RV5C338A-E2

  • 3-WIRE SERIAL INTERFACE REAL-TIME CLOCK ICs WITH VOLTAGE MON...

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R
5C338A
4.2 Periodic Interrupt
Setting of the periodic selection bits (CT
2
to CT
0
) enables periodic interrupt to the CPU. There are two waveform
modes: pulse mode and level mode. In the pulse mode, the output has a waveform duty cycle of around 50%. In the
level mode, the output is cyclically driven low and, when the CTFG bit is set to 0, the output is set to high (OFF).
Waveform Mode, Cycle and Falling Timing
Description
CT
2
CT
1
CT
0
Waveform mode
Cycle and falling timing
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
鈥?/div>
鈥?/div>
Off (鈥淗鈥?
Fixed at low (鈥淟鈥?
(Default setting)
Pulse Mode
*
1
2Hz (Duty cycle of 50%)
Pulse Mode
*
1
1Hz (Duty cycle of 50%)
Level Mode
*
2
Once per 1 second (Synchronized with second counter increment)
Level Mode
*
2
Once per minute (at 00 seconds of every minute)
Level Mode
*
2
Once per hour (at 00 minutes and 00 seconds of every hour)
Level Mode
*
2
Once per month (at 00 hours, 00 minutes, and 00 seconds of first day of every month)
1) Pulse Mode : 2-Hz and 1-Hz clock pulses are output in synchronization with the increment of the second counter
as illustrated in the timing chart on the next page.
2) Level Mode : periodic interrupt signals are output with selectable interrupt cycle settings of 1 second, 1 minute, 1
hour, and 1 month. The increment of the second counter is synchronized with the falling edge of
periodic interrupt signals. For example, periodic interrupt signals with an interrupt cycle setting of
1 second are output in synchronization with the increment of the second counter as illustrated in
the timing chart on the next page.
3) When the oscillation adjustment circuit is used, the interrupt cycle will fluctuate once per 20 seconds as follows:
Pulse Mode : the 鈥淟鈥?period of output pulses will increment or decrement by a maximum of 鹵3.784ms.
For example, 1-Hz clock pulses will have a duty cycle of 50 鹵0.3784%.
Level Mode : a periodic interrupt cycle of 1 second will increment or decrement by a maximum of 鹵3.784ms.
36

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