Block Diagram of Voltage Detector with delay Circuit.
鈥?/div>
V
ref
RESET
GND
C
D
Extermal Capacitor
5. Main Power Source Control (in the case of Optional Mask Version)
鈥?This IC includes built-in Edge Trigger Flip-Flop (Rising Edge Operation) and AND Gate, so that Main Power
Source of any instruments can be turned ON/OFF by 鈥淎ND鈥?of Toggle Input and Level Input.
鈥?Edge Trigger Flip-Flop is reset by One Shot Pulse Generator when Voltage Detector 1 or 2 detects the lowering
of the voltage. This Flip-Flop can be continuously reset during the detection.
6