level. The output of Voltage Detector 1 is Nch Open Drain Output.
鈥?/div>
Voltage Detector 1 can be set as follows by optional mask:
1. ON/OFF Control of Voltage Detector 1.
2. Output of Voltage Detector 1 at the detection can be set at 鈥淟鈥?level or 鈥淗鈥?level.
3. Output of Voltage Detector 1 at OFF can be set at 鈥淟鈥?level or 鈥淗鈥?level.
4. Sense Pins of Voltage Detectors 1, 2 can be connected to Output R
OUT1
, R
OUT2
, R
OUT3
, R
OUT4
of Voltage
Regulators or V
DD
within the IC.
4. Voltage Detector 2
鈥?/div>
When Voltage Detector 2 detects the lowering of V
SEN2
, the level of the output of Voltage Detector 2 becomes 鈥淟鈥?/div>
level. The output of Voltage Detector 2 is Nch Open Drain Output.
鈥?/div>
Voltage Detector 2 can set Reset Delay Time. Delay Time can be set in accordance with the capacitance C
D
of
External Capacitor as shown on the following pages.
鈥?/div>
Voltage detector 2 can be set as follows by optional mask:
1. ON/OFF Control of Voltage Detector 2.
2. Output of Voltage Detector 2 at the detection can be set at 鈥淟鈥?level or 鈥淗鈥?level.
3. Output of Voltage Detector 2 at OFF can be set at 鈥淟鈥?level or 鈥淗鈥?level.
4. Sense Pins of Voltage Detectors 2 can be connected to Output R
OUT1
, R
OUT2
, R
OUT3
, R
OUT4
of Voltage
Regulators or V
DD
within the IC.
5
prev
next