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RV5VE001A-E2 Datasheet

  • RV5VE001A-E2

  • MULTI-POWER SUPPLY

  • 49頁

  • RICOH

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RV5VE0
脳脳脳
DESCRIPTION OF EACH CIRCUIT
1. Voltage Regulators 1,2
鈥?/div>
Voltage Regulators 1, 2 are linear regulators which can be constructed of external PNP Transistor, and are capa-
ble of obtaining a large output current by a small Dropout Voltage.
鈥?/div>
Output Voltage of each of Voltage Regulators 1, 2 can be set stepwise with a step of 0.1V in the range of 3V to 6V
by laser trim.
鈥?/div>
Voltage Regulators 1, 2 can be turned ON/OFF by Control Pins.
鈥?/div>
Use External PNP Transistor of a low saturation type, with an h
FE
of 100 or more.
鈥?/div>
Use Voltage Regulators 1, 2 with the attachment of a Capacitor with a capacitance of 10碌F or more to the Output
Pins.
2. Voltage Regulators 3,4
鈥?/div>
Voltage Regulators 3, 4 are CMOS type linear regulators and have the same structure as those of Voltage
Regulators R
5RL and R
5RE series.
鈥?/div>
Output Voltage of each of Voltage Regulators 3, 4 can be set stepwise with a step of 0.1V in the range of 2V to 6V
by laser trim.
鈥?/div>
Voltage Regulators 3, 4 can be turned ON/OFF by Control Pins.
3. Voltage Detector 1
鈥?/div>
When Voltage Detector 1 detects the lowering of V
SEN1
, the level of the output of Voltage Detector 1 becomes 鈥淟鈥?/div>
level. The output of Voltage Detector 1 is Nch Open Drain Output.
鈥?/div>
Voltage Detector 1 can be set as follows by optional mask:
1. ON/OFF Control of Voltage Detector 1.
2. Output of Voltage Detector 1 at the detection can be set at 鈥淟鈥?level or 鈥淗鈥?level.
3. Output of Voltage Detector 1 at OFF can be set at 鈥淟鈥?level or 鈥淗鈥?level.
4. Sense Pins of Voltage Detectors 1, 2 can be connected to Output R
OUT1
, R
OUT2
, R
OUT3
, R
OUT4
of Voltage
Regulators or V
DD
within the IC.
4. Voltage Detector 2
鈥?/div>
When Voltage Detector 2 detects the lowering of V
SEN2
, the level of the output of Voltage Detector 2 becomes 鈥淟鈥?/div>
level. The output of Voltage Detector 2 is Nch Open Drain Output.
鈥?/div>
Voltage Detector 2 can set Reset Delay Time. Delay Time can be set in accordance with the capacitance C
D
of
External Capacitor as shown on the following pages.
鈥?/div>
Voltage detector 2 can be set as follows by optional mask:
1. ON/OFF Control of Voltage Detector 2.
2. Output of Voltage Detector 2 at the detection can be set at 鈥淟鈥?level or 鈥淗鈥?level.
3. Output of Voltage Detector 2 at OFF can be set at 鈥淟鈥?level or 鈥淗鈥?level.
4. Sense Pins of Voltage Detectors 2 can be connected to Output R
OUT1
, R
OUT2
, R
OUT3
, R
OUT4
of Voltage
Regulators or V
DD
within the IC.
5

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