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L4004F81 Datasheet

  • L4004F81

  • Sensitive Triacs (0.8 A to 8 A)

  • 8頁

  • LITTELFUSE   LITTELFUSE

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Sensitive Triacs
Data Sheets
Part No.
I
T(RMS)
(11)
MT2
MT2
Isolated
Non-isolated
V
DRM
(1)
I
GT
(3) (6)
I
DRM
(1) (14)
G
MT2
MT1
MT1
MT2
G
MT1
G
MT2
TO-220
MAX
TO-252
D-Pak
TO-251
V-Pak
Volts
MIN
200
400
600
200
400
600
200
400
600
200
400
600
200
400
600
QI
5
5
5
5
5
5
10
10
10
5
5
5
10
10
10
6A
8A
See 鈥淧ackage Dimensions鈥?section for variations. (12)
L2006L5
L2006D5
L2006V5
L4006L5
L4006D5
L4006V5
L6006L5
L6006D5
L6006V5
L2006L6
L2006D6
L2006V6
L4006L6
L4006D6
L4006V6
L6006L6
L6006D6
L6006V6
L2006L8
L2006D8
L2006V8
L4006L8
L4006D8
L4006V8
L6006L8
L6006D8
L6006V8
L2008L6
L2008D6
L2008V6
L4008L6
L4008D6
L4008V6
L6008L6
L6008D6
L6008V6
L2008L8
L2008D8
L2008V8
L4008L8
L4008D8
L4008V8
L6008L8
L6008D8
L6008V8
mAmps
QII
QIII
MAX
5
5
5
5
5
5
5
5
5
5
5
5
10
10
10
10
10
10
5
5
5
5
5
5
10
10
10
10
10
10
QIV
5
5
5
10
10
10
20
20
20
10
10
10
20
20
20
mAmps
T
C
= 25 擄C T
C
= 110 擄C
MAX
0.02
0.5
0.02
0.5
0.02
0.5
0.02
0.5
0.02
0.5
0.02
0.5
0.02
0.5
0.02
0.5
0.02
0.5
0.02
0.5
0.02
0.5
0.02
0.5
0.02
0.5
0.02
0.5
0.02
0.5
Specified Test Conditions
di/dt
鈥?Maximum rate-of-change of on-state current; I
GT
= 50 mA with
0.1
s rise time
dv/dt
鈥?Critical rate-of-rise of off-state voltage at rated V
DRM
gate open
dv/dt(c)
鈥?Critical rate-of-rise of commutation voltage at rated V
DRM
and I
T(RMS)
commutating di/dt = 0.54 rated I
T(RMS)
/ms; gate
unenergized
I
2
t
鈥?RMS surge (non-repetitive) on-state current for period of 8.3 ms
for fusing
I
DRM
鈥?Peak off-state current, gate open; V
DRM
= max rated value
I
GT
鈥?DC gate trigger current in specific operating quadrants;
V
D
= 12 V dc; R
L
= 60
鈩?/div>
I
GTM
鈥?Peak gate trigger current
I
H
鈥?Holding current gate open; initial on-state current = 100 mA dc
I
T(RMS)
鈥?RMS on-state current conduction angle of 360擄
I
TSM
鈥?Peak one-cycle surge
P
G(AV)
鈥?Average gate power dissipation
P
GM
鈥?Peak gate power dissipation;
I
GT
鈮?/div>
I
GTM
t
gt
鈥?Gate controlled turn-on time; I
GT
= 50 mA with 0.1 碌s rise time
V
DRM
鈥?Repetitive peak off-state/blocking voltage
V
GT
鈥?DC gate trigger voltage; V
D
= 12 V dc; R
L
= 60
鈩?/div>
V
TM
鈥?Peak on-state voltage at max rated RMS current
General Notes
鈥?/div>
鈥?/div>
鈥?/div>
All measurements are made with 60 Hz resistive load and at an
ambient temperature of +25
擄C
unless otherwise specified.
Operating temperature range (T
J
) is -65
擄C
to +110
擄C
for TO-92
devices and -40
擄C
to +110
擄C
for all other devices.
Storage temperature range (T
S
) is -65
擄C
to +150
擄C
for TO-92
devices, -40
擄C
to +150
擄C
for TO-202 devices, and -40
擄C
to
+125
擄C
for TO-220 devices.
Lead solder temperature is a maximum of 230
擄C
for 10 seconds
maximum at a minimum of 1/16鈥?(1.59 mm) from case.
The case or lead temperature (T
C
or T
L
) is measured as shown on
dimensional outline drawings. See 鈥淧ackage Dimensions鈥?section
of this catalog.
鈥?/div>
鈥?/div>
http://www.littelfuse.com
+1 972-580-7777
E1 - 4
漏2004 Littelfuse, Inc.
Thyristor Product Catalog

L4004F81 產(chǎn)品屬性

  • 500

  • 分離式半導體產(chǎn)品

  • 三端雙向可控硅開關

  • -

  • 邏輯 - 靈敏柵極

  • 400V

  • 4A

  • 2V

  • 33A,40A

  • 10mA

  • 15mA

  • 單一

  • 通孔

  • TO-202 長接片

  • TO-202

  • 散裝

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