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K4C561638C-TCDA Datasheet

  • K4C561638C-TCDA

  • 256Mb Network-DRAM

  • 880.52KB

  • 42頁

  • SAMSUNG   SAMSUNG

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上傳產品規(guī)格書

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K4C5608/1638C
256Mb Network-DRAM
Notes
:
1. All voltages are referenced to Vss, VssQ.
2. V
REF
is expected to track variations in VddQ DC level of the transmitting device.
Peak to peak AC noise on V
REF
may not exceed 鹵 2% of V
REF
(DC).
3. Overshoot Iimit : V
IH
(max.) = VddQ + 0.9V with a pulse width <= 5ns
4. Undershoot Iimit : V
IL
(min.) = -0.9V with a pulse width <= 5ns
5. V
IH
(DC) and V
IL
(DC) are levels to maintain the current logic state.
6. V
IH
(AC) and V
IL
(AC) are levels to change to the new logic state.
7. V
ID
is magnitude of the difference between CK input level and CK input level.
8. The value of Vx(AC) is expected to equal VddQ/2 of the transmitting device.
9. V
ISO
means [V
ICK
(CK) + V
ICK
(CK)]/2
10. Refer to the figure below.
CLK
V
X
V
X
V
ICK
V
X
V
X
V
ICK
V
ICK
V
X
V
ID
(AC)
CLK
V
ICK
V
SS
V
ID
(AC)
0 V Differential
V
ISO
V
ISO
(min)
V
ISO
(max)
V
SS
11. In the case of external termination, VTT(Termination Voltage) should be gone in the range of V
REF
(DC) 鹵 0.04V.
Pin Capacitance
(Vdd, VddQ = 2.5V, f = 1MHz, Ta = 25脳
擄C
)
Symbol
C
IN
C
INC
C
I/O
C
NC1
C
NC2
Input Pin Capacitance
Clock Pin (CK, CK) Capacitance
I/O Pin (DQ, DQS) Capacitance
NC1 Pin Capacitance
NC2 Pin Capacitance
Parameter
Min
2.5
2.5
3.0
-
4.0
Max
4.0
4.0
6.0
1.5
6.0
Units
pF
pF
pF
pF
pF
Note :
These parameters are periodically sampled and not 100% tested.
2 The NC
2
pins have additional capacitance for adjustment of the adjacent pin capacitance.
1 The NC
2
pins have Power and Ground clamp.
- 9 -
REV. 0.7 Aug. 2003

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