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RX4000V4 Datasheet

  • RX4000V4

  • RX4000(uITRON4.0) Basics User＇s Manual | User＇s Manual[02/...

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CHAPTER 7 TIME MANAGEMENT
It is also possible to save this phase using the cyclic handler attribute TA_PHS. Saving a phase involves reckoning
the time from when a cyclic handler is created to when the next cyclic handler is activated [phase + (activation cycle
脳
n)] when a cyclic handler is operating due to the issuance of the service call (i)sta_cyc. If phase saving is not
performed, the elapse of one cycle time reckoned from the issuance of (i)sta_cyc becomes the next activation time.
Figure 7-2. Phase Saving
p: cycphs
c: cyctim
Cyclic handler activation
With phase saving
p
c
c
c
0
cre_cyc issuance
(no TA_STA specification)
sta_cyc issuance
System time
Figure 7-3. No Phase Saving
p: cycphs
c: cyctim
Cyclic handler activation
Without phase saving
c
c
p
c
c
c
0
cre_cyc issuance
(no TA_STA specification)
sta_cyc issuance
System time
7.5.7
Interrupts during cyclic handler execution
The cyclic handler operates with interrupts managed by the kernel (interrupts for which it is possible to perform
processing in which a kernel service is received, such as interrupt service routine activation) masked. Therefore, to
enable these interrupts during cyclic handler execution, the user must explicitly set interrupts to enabled (by setting the
IM bit of the status register).
Note that because the cyclic handler processing and timer interrupt processing are independent of each other, it is
possible to acknowledge timer interrupts even during cyclic handler execution by enabling interrupts.
88
User鈥檚 Manual U14833EJ2V0UM

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