最新免费av在线观看,亚洲综合一区成人在线,中文字幕精品无码一区二区三区,中文人妻av高清一区二区,中文字幕乱偷无码av先锋

P10C68-35IGDCBS Datasheet

  • P10C68-35IGDCBS

  • CMOS/SNOS NVSRAM HIGH PERFORMANCE 8 K x 8 NON-VOLATILE STATI...

  • 17頁

  • ZARLINK   ZARLINK

掃碼查看芯片數(shù)據(jù)手冊(cè)

上傳產(chǎn)品規(guī)格書

PDF預(yù)覽

P10C68/P11C68
NON-VOLATILE MEMORY OPERATION OF P11C68
MODE SELECTION
E
H
L
L
L
W
X
H
L
H
A
12
-A
0
(hex)
X
X
X
0000
1555
0AAA
1FFF
10F0
0F0F
L
H
0000
1555
0AAA
1FFF
10F0
0F0E
Mode
Not selected
Read RAM
Write RAM
Read RAM
Read RAM
Read RAM
Read RAM
Read RAM
Non-volatile STORE
Read RAM
Read RAM
Read RAM
Read RAM
Read RAM
Non-volatile RECALL
I/O
Output High Z
Output data
Input Data
Output Data
Output Data
Output Data
Output Data
Output Data
Output High Z
Output Data
Output Data
Output Data
Output Data
Output Data
Output High Z
I
CC2
Active
Power
Standby
Active
Active
Active
21, 22
21, 22
21, 22
21, 22
21, 22
20
21, 22
21, 22
21, 22
21, 22
21, 22
21
22
Notes
NOTES
21.
The six consecutive addresses must be in order listed - (0000, 1555, 0AAA, 1FFF, 10F0, 0F0F) for a STORE cycle or
(0000, 1555, 0AAA, 1FFF, 10F0, 0F0E) for a RECALL cycle. W (bar) must be high during all six consecutive cycles. See
STORE CYCLE and RECALL CYCLE tables and diagrams for further details.
22.
I/O state assumes that G (bar)
鈮
IL
. Activation of non-volatile cycles does not depend on the state of G (bar).
STORE / RECALL CYCLES 1 AND 2
(See notes 24 and 29)
Symbol
Standard
t
AVAV
t
AXAV
t
AVQZ
t
AVEL
t
ELEH
t
EHAX
Alternative
t
ACS
t
SKEW
t
ELQZ
t
STORE
t
RECALL
t
AE
t
EP
t
EA
Read cycle time
Skew between sequentially
adjacent addresses
Address valid to output inactive
Store cycle time
Recall cycle time
Address set-up to chip enable
Chip enable pulse width
Chip disable to address change
Parameter
P11C68-35
Min.
35
5
75
10
20
0
35
0
0
45
0
Max.
P11C68-45
Units
Min.
45
5
75
10
20
Max.
ns
ns
ns
ms
碌s
ns
ns
ns
Notes
23
25
26
26, 30
27
27
27
NOTES
23.
Skew spec may be avoided by using E (bar) (STORE/RECALL CYCLE 2).
24.
W (bar)
鈮
IH
during entire address sequence to initiate a non-volatile cycle.
Required address sequences are shown in the Mode Selection table.
25.
Once the software STORE or RECALL cycle is initiated, it completes automatically, ignoring all inputs.
26.
Measured with W (bar) high, G (bar) low and E (bar) low. Note that STORE cycles (but not RECALLS) are aborted by Vcc
< 3.3V (STORE Inhibit).
27.
E (bar) must make the transition between V
IH
(max) to V
IL
(max), or V
IL
(max) to V
IH
(min) in a monotonic fashion.
28.
Chip is continuously selected with E (bar) low.
29.
Addresses 1 through 6 are found in the Mode Selection table. Address 6 determines whether the P11C68 performs a
STORE or RECALL. A RECALL cycle is performed automatically at power up when V
CC
exceeds 3.3V. V
CC
must not drop
below 3.3V once it has exceeded it for the RECALL to function properly, t
RECALL
is measured from the point at which V
CC
exceeds 3.3V.
30.
Address transitions may not occur on any address pin during this time.
12

P10C68-35IGDCBS相關(guān)型號(hào)PDF文件下載

您可能感興趣的PDF文件資料

熱門IC型號(hào)推薦

掃碼下載APP，
一鍵連接廣大的電子世界。

在線人工客服

買家服務(wù)：
賣家服務(wù)：
技術(shù)客服：

0571-85317607

網(wǎng)站技術(shù)支持

13606545031

客服在線時(shí)間周一至周五
9:00-17:30

關(guān)注官方微信號(hào)，
第一時(shí)間獲取資訊。

建議反饋
返回頂部

建議反饋

聯(lián)系人：

聯(lián)系方式：

按住滑塊，拖拽到最右邊
>>
感謝您向阿庫提出的寶貴意見，您的參與是維庫提升服務(wù)的動(dòng)力！意見一經(jīng)采納，將有感恩紅包奉上哦！