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M12L32162A-7BG Datasheet

  • M12L32162A-7BG

  • 1M x 16Bit x 2Banks Synchronous DRAM

  • 29頁

  • ESMT

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ESMT
DC CHARACTERISTICS
Preliminary
M12L32162A
(Recommended operating condition unless otherwise noted, T
A
= 0 to 70
擄C
V
IH
(min)/V
IL
(max)=2.0V/0.8V)
Parameter
Operating Current
(One Bank Active)
Precharge Standby
Current in power-down
mode
Precharge Standby
Current in non
power-down mode
Symbol
Test Condition
CAS
Latency
Version
-7
100
2
2
25
mA
Unit Note
mA
mA
1
I
CC1
I
CC2P
I
CC2PS
I
CC2N
Burst Length = 1
t
RC
鈮?/div>
t
RC
(min), t
CC
鈮?/div>
t
CC
(min), I
OL
= 0mA
CKE
鈮?/div>
V
IL
(max), t
CC
=15ns
CKE
鈮?/div>
V
IL
(max), CLK
鈮?/div>
V
IL
(max), t
CC
=
鈭?/div>
CKE
鈮?/div>
V
IH
(min), CS
鈮?/div>
V
IH
(min), t
CC
=15ns
Input signals are changed one time during 30ns
CKE
鈮?/div>
V
IH
(min), CLK
鈮?/div>
V
IL
(max), t
CC
=
鈭?/div>
Input signals are stable
CKE
鈮?/div>
V
IL
(max), t
CC
=15ns
CKE
鈮?/div>
V
IL
(max), CLK
鈮?/div>
V
IL
(max), t
CC
=
鈭?/div>
CKE
鈮?/div>
V
IH
(min), CS
鈮?/div>
V
IH
(min), t
CC
=15ns
Input signals are changed one time during 30ns
CKE
鈮?/div>
V
IH
(min), CLK
鈮?/div>
V
IL
(max), t
CC
=
鈭?/div>
Input signals are stable
I
OL
= 0Ma, Page Burst
All Band Activated, t
CCD
= t
CCD
(min)
t
RC
鈮?/div>
t
RC
(min)
CKE
鈮?/div>
0.2V
3
2
I
CC2NS
Active Standby Current
in power-down mode
Active Standby Current
in non power-down
mode
(One Bank Active)
Operating Current
(Burst Mode)
Refresh Current
Self Refresh Current
I
CC3P
I
CC3PS
I
CC3N
I
CC3NS
I
CC4
15
10
10
25
15
120
120
120
1
mA
mA
mA
mA
mA
1
I
CC5
I
CC6
mA
mA
2
Note:
1.Measured with outputs open. Addresses are changed only one time during t
CC
(min).
2.Refresh period is 64ms. Addresses are changed only one time during t
CC
(min).
Elite Semiconductor Memory Technology Inc.
Publication Date
:
Apr. 2007
Revision
:
0.3
5/29

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