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M12S64322A-6BG Datasheet

  • M12S64322A-6BG

  • 512K x 32 Bit x 4 Banks Synchronous DRAM

  • 725.62KB

  • 46頁

  • ESMT

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ESMT
CAPACITANCE
(V
DD
= 2.5V, T
A
= 25
擄C , f = 1MHZ)
Parameter
Input capacitance (A0 ~ A10, BA0 ~ BA1)
Input capacitance
(CLK, CKE, CS , RAS , CAS ,
WE
& DQM)
Data input/output capacitance (DQ0 ~ DQ31)
Symbol
CIN1
CIN2
COUT
Min
2.5
2.5
2
Max
4
4
6.5
M12S64322A
Unit
pF
pF
pF
DC CHARACTERISTICS
Recommended operating condition unless otherwise noted錛孴
A
= 0 to 70 擄C
CAS
Latency
Version
-6
-7
Unit
Note
Parameter
Symbol
Test Condition
Burst Length = 1
Operating Current
(One Bank Active)
I
CC1
I
CC2P
I
CC2PS
I
CC2N
I
CC2NS
t
RC
鈮?/div>
t
RC(min)
I
OL
= 0 mA
CKE
鈮?/div>
V
IL
(max), tcc = 15ns
CKE & CLK
鈮?/div>
V
IL
(max), t
cc
=
鈭?/div>
CKE
鈮?/div>
V
IH
(min), CS
鈮?/div>
V
IH
(min), t
cc
= 15ns
Input signals are changed one time during 30ns
CKE
鈮?/div>
V
IH
(min), CLK
鈮?/div>
V
IL
(max), t
cc
=
鈭?/div>
input signals are stable
CKE
鈮?/div>
V
IL
(max), tcc = 15ns
CKE & CLK
鈮?/div>
V
IL
(max), t
cc
=
鈭?/div>
CKE
鈮?/div>
VIH(min), CS
鈮?/div>
V
IH
(min), tcc = 15ns
Input signals are changed one time during 30ns
CKE
鈮?/div>
V
IH
(min), CLK
鈮?/div>
V
IL
(max), tcc =
鈭?/div>
input signals are stable
IOL = 0 mA
Page Burst
2 Banks activated
t
RC
鈮?/div>
t
RC(min)
CKE
鈮?/div>
0.2V
3
2
160
2
140
mA
1,2
Precharge Standby Current
in power-down mode
mA
2
30
mA
10
10
10
40
mA
mA
Precharge Standby Current
in non power-down mode
Active Standby Current
in power-down mode
Active Standby Current
in non power-down mode
(One Bank Active)
I
CC3P
I
CC3PS
I
CC3N
I
CC3NS
10
250
200
310
2
220
mA
Operating Current
(Burst Mode)
Refresh Current
Self Refresh Current
Note :
I
CC4
mA
180
285
mA
mA
1,2
I
CC5
I
CC6
1. Measured with outputs open.
2. Input signals are changed one time during 2 CLKS.
Elite Semiconductor Memory Technology Inc.
Publication Date: May. 2007
Revision: 1.0
6/46

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