最新免费av在线观看,亚洲综合一区成人在线,中文字幕精品无码一区二区三区,中文人妻av高清一区二区,中文字幕乱偷无码av先锋

M12S16161A-7TG Datasheet

  • M12S16161A-7TG

  • 512K x 16Bit x 2Banks Synchronous DRAM

  • 29頁

  • ESMT

掃碼查看芯片數(shù)據(jù)手冊

上傳產(chǎn)品規(guī)格書

PDF預覽

ESMT
Burst Read Single bit Write Cycle @Burst Length=2
CLOCK
M12S16161A
*Note1
CKE
HIGH
CS
RAS
*Note2
CAS
ADDR
RAa
CAa
RBb
CAb
RAc
CBc
CAd
BA
A10 /AP
RAa
RBb
RAc
CL=2
DQ
CL= 3
DAa0
QAb0 QAb1
DBc0
QAd0 QAd1
DAa0
QAb0 QAb1
DBc0
QAd0 QAd1
WE
DQM
Row Active
( A- B an k )
Row Active
(B-Bank)
Read with
Auto Precharge
(A-Bank)
Row Act ive
( A- B an k )
W rite with
Auto Pr echarge
( B- Bank )
Read
( A- B an k )
Precharge
( A- B an k )
W rite
(A- Ban k)
:Don't Care
*Note:1.BRSW modes is enabled by setting A9 鈥淗igh鈥?at MRS(Mode Register Set).
At the BRSW Mode, the burst length at write is fixed to 鈥?鈥?regardless of programmed burst length.
2.When BRSW write command with auto precharge is executed, keep it in mind that t
RAS
should not be violated.
Auto precharge is executed at the next cycle of burst-end, so in the case of BRSW write command, the precharge
command will be issued after two clock cycles.
Elite Semiconductor Memory Technology Inc.
Publication Date
:
May. 2007
Revision
:
1.1
23/29

M12S16161A-7TG相關(guān)型號PDF文件下載

您可能感興趣的PDF文件資料

熱門IC型號推薦

掃碼下載APP，
一鍵連接廣大的電子世界。

在線人工客服

買家服務：
賣家服務：
技術(shù)客服：

0571-85317607

網(wǎng)站技術(shù)支持

13606545031

客服在線時間周一至周五
9:00-17:30

關(guān)注官方微信號，
第一時間獲取資訊。

建議反饋
返回頂部

建議反饋

聯(lián)系人：

聯(lián)系方式：

按住滑塊，拖拽到最右邊
>>
感謝您向阿庫提出的寶貴意見，您的參與是維庫提升服務的動力！意見一經(jīng)采納，將有感恩紅包奉上哦！