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MAX9600EUP+ Datasheet

  • MAX9600EUP+

  • Voltage Comparator IC; No. of Comparators:2; Comparator Type...

  • 268.30KB

  • 12頁(yè)

  • Maxim   Maxim

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Dual ECL and Dual/Quad PECL, 500ps,
Ultra-High-Speed Comparators
Timing Information (MAX9600/MAX9601)
The timing diagram (Figure 1) illustrates the operation
of a comparator with latch enable. The top line of the
diagram illustrates a latch-enable pulse. Initially, the
latch-enable input (LE,
LE_)
is differentially high, which
places the comparator in latch mode. When the input
signal (IN_+, IN_-) switches from low to high, the output
(Q_,
Q_)
remains latched to the previous low state.
When the latch-enable input goes differentially low,
starting the compare function, the output responds to
the input and transitions to high after a time (t
LPD
). The
leading edges of the subsequent input signal switch
the comparator after time interval t
PD+
or t
PD-
(depend-
ing on the direction of the input transitions) until a high
latch-enable pulse places the device in latch mode
again. The input signal must occur at minimum time
(t
LS
) before the latch rising edge, and must maintain its
state for at least t
LH
after the rising edge. A minimum
latch-pulse width (t
LPW
) of 250ps (typ) is needed for
proper latch operation.
ECL/PCL
The MAX9600/MAX9601/MAX9602 outputs are emitter
followers that require external resistive connections to a
voltage source (V
T
) more negative than the lowest V
OL
for proper static and dynamic operation. When properly
terminated, the outputs provide appropriate levels, V
OL
or V
OH
, for ECL (MAX9600) or PECL (MAX9601/
MAX9602). Output-current polarity always sinks into the
termination scheme during proper operation.
ECL-output signal levels are referenced to GND, and
PECL-output signals are referenced to V
CCO
_.
MAX9600/MAX9601/MAX9602
Chip Information
MAX9600 TRANSISTOR COUNT: 558
MAX9601 TRANSISTOR COUNT: 600
MAX9602 TRANSISTOR COUNT: 608
PROCESS: Bipolar
Pin Configurations
TOP VIEW
QA 1
QA 2
GND 3
LEA 4
LEA 5
V
EE
6
V
CC
7
HYSA 8
INA- 9
INA+ 10
20 QB
19 QB
18 GND
17 LEB
QA 1
QA 2
V
CCOA
3
LEA 4
LEA 5
V
EE
6
V
CC
7
HYSA 8
INA- 9
INA+ 10
20 QB
19 QB
18 V
CCOB
17 LEB
INA+ 1
INA- 2
V
EE
3
INB+ 4
INB- 5
V
CC
6
INC+ 7
INC- 8
V
EE
9
IND+ 10
IND- 11
24 V
CCOA
23 QA
22 QA
21 V
CCOB
MAX9600
16 LEB
15 V
EE
14 V
CC
13 HYSB
12 INB-
11 INB+
MAX9601
16 LEB
15 V
EE
14 V
CC
13 HYSB
12 INB-
11 INB+
MAX9602
20 QB
19 QB
18 V
CCOC
17 QC
16 QC
15 V
CCOD
14 QD
13 QD
TSSOP-20
TSSOP-20
V
CC
12
TSSOP-24
______________________________________________________________________________________
11

MAX9600EUP+ 產(chǎn)品屬性

  • Lead (SnPb) Finish for COTSObsolescence Mitigation Program

  • 74

  • 集成電路 (IC)

  • 線性 - 比較器

  • -

  • 帶鎖銷

  • 2

  • 補(bǔ)充型，差分，ECL

  • -

  • 5mV @ -5.2V，5V

  • 6µA @ -5.2V，5V

  • 50mA

  • 24mA

  • 70dB CMRR，65dB PSRR

  • 0.5ns

  • 30mV

  • -40°C ~ 85°C

  • 20-TSSOP（0.173"，4.40mm 寬）

  • 表面貼裝

  • 管件

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