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MCP1726-ADJE/MF Datasheet

  • MCP1726-ADJE/MF

  • IC, LDO, 1A, ADJ, 8DFN; Primary Input Voltage:6V; Output Vol...

  • 30頁

  • Microchip   Microchip

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MCP1726
Junction Temperature Estimate
To estimate the internal junction temperature, the
calculated temperature rise is added to the ambient or
offset temperature. For this example, the worst-case
junction temperature is estimated below:
T
J
= T
JRISE
+ T
A(MAX)
T
J
= 48.8擄C + 70.0擄C
T
J
= 118.8擄C
As you can see from the result, this application will be
operating very near the maximum operating junction
temperature of 125擄C. The PCB layout for this applica-
tion is very important as it has a significant impact on
the junction-to-ambient thermal resistance (R胃
JA
) of
the 3X3 DFN package, which is very important in this
application.
Maximum Package Power Dissipation at
70擄C Ambient Temperature
3X3DFN (41擄 C/W R胃
JA
)
P
D(MAX)
= (125擄C 鈥?70擄C) / 41擄 C/W
P
D(MAX)
= 1.34W
SOIC8 (150擄C/Watt R胃
JA
)
P
D(MAX)
= (125擄C 鈥?70擄C)/ 150擄 C/W
P
D(MAX)
= 0.366W
From this table you can see the difference in maximum
allowable power dissipation between the 3X3 DFN
package and the 8-pin SOIC package. This difference
is due to the exposed metal tab on the bottom of the
DFN package. The exposed tab of the DFN package
provides a very good thermal path from the die of the
LDO to the PCB. The PCB then acts like a heatsink,
providing more area to distribute the heat generated by
the LDO.
DS21936B-page 20
漏
2005 Microchip Technology Inc.

MCP1726-ADJE/MF 產(chǎn)品屬性

  • Microchip

  • 低壓降 (LDO) 調(diào)節(jié)器

  • 6 V

  • 0.8 V to 5 V

  • 0.5 V at 1 A

  • 1 A

  • 0.5 %

  • 1

  • Adjustable

  • + 125 C

  • SMD/SMT

  • DFN-8

  • 0.14 mA

  • + 2.3 V

  • 0.05 % / V

  • - 40 C

  • Tube

  • 0.41 V

  • 120

  • 2.5 %

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