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MAX149BEAP+ Datasheet

  • MAX149BEAP+

  • IC, ADC, 10BIT, 133KSPS, SSOP-20; Resolution (Bits):10; Samp...

  • 221.10KB

  • 24頁

  • Maxim   Maxim

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+2.7V to +5.25V, Low-Power, 8-Channel,
Serial 10-Bit ADCs
______________________________________________________________Pin Description
PIN
1鈥?
9
NAME
CH0鈥揅H7
COM
Sampling Analog Inputs
Ground reference for analog inputs. COM sets zero-code voltage in single-ended mode. Must be
stable to 鹵0.5LSB.
Three-Level Shutdown Input. Pulling
SHDN
low shuts the MAX148/MAX149 down; otherwise, they are
fully operational. Pulling
SHDN
high puts the reference-buffer amplifier in internal compensation mode.
Letting
SHDN
float puts the reference-buffer amplifier in external compensation mode.
Reference-Buffer Output/ADC Reference Input. Reference voltage for analog-to-digital conversion.
In internal reference mode (MAX149 only), the reference buffer provides a 2.500V nominal output,
externally adjustable at REFADJ. In external reference mode, disable the internal buffer by pulling
REFADJ to V
DD
.
Input to the Reference-Buffer Amplifier. To disable the reference-buffer amplifier, tie REFADJ to V
DD
.
Analog Ground
Digital Ground
Serial-Data Output. Data is clocked out at SCLK鈥檚 falling edge. High impedance when
CS
is high.
Serial-Strobe Output. In internal clock mode, SSTRB goes low when the MAX148/MAX149 begin the
A/D conversion, and goes high when the conversion is finished. In external clock mode, SSTRB pulses
high for one clock period before the MSB decision. High impedance when
CS
is high (external clock
mode).
Serial-Data Input. Data is clocked in at SCLK鈥檚 rising edge.
Active-Low Chip Select. Data will not be clocked into DIN unless
CS
is low. When
CS
is high, DOUT is
high impedance.
Serial-Clock Input. Clocks data in and out of serial interface. In external clock mode, SCLK also sets
the conversion speed. (Duty cycle must be 40% to 60%.)
Positive Supply Voltage
FUNCTION
MAX148/MAX149
10
SHDN
11
VREF
12
13
14
15
REFADJ
AGND
DGND
DOUT
16
SSTRB
17
18
19
20
DIN
CS
SCLK
V
DD
V
DD
V
DD
6k
DOUT
C
LOAD
50pF
DGND
a)
V
OH
to High-Z
DOUT
C
LOAD
50pF
DGND
b)
V
OL
to High-Z
DOUT
C
LOAD
50pF
DGND
a)
High-Z to V
OH
and V
OL
to V
OH
DOUT
6k
6k
C
LOAD
50pF
DGND
b)
High-Z to V
OL
and V
OH
to V
OL
6k
Figure 1. Load Circuits for Enable Time
Figure 2. Load Circuits for Disable Time
_______________________________________________________________________________________
7

MAX149BEAP+ 產(chǎn)品屬性

  • Lead (SnPb) Finish for COTSObsolescence Mitigation Program

  • 66

  • 集成電路 (IC)

  • 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器

  • -

  • 10

  • 133k

  • MICROWIRE?，QSPI?，串行，SPI?

  • 1

  • 640mW

  • 單電源

  • -40°C ~ 85°C

  • 表面貼裝

  • 20-SSOP（0.209"，5.30mm 寬）

  • 20-SSOP

  • 管件

  • 8 個單端，單極；8 個單端，雙極；4 個差分，單極；4 個差分，雙極

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