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MSP430F247TRGC Datasheet

  • MSP430F247TRGC

  • Texas Instruments [MIXED SIGNAL MICROCONTROLLER]

  • TI

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MSP430x23x, MSP430x24x(1), MSP430x2410
MIXED SIGNAL MICROCONTROLLER
SLAS547A -- JUNE 2007 -- REVISED NOVEMBER 2007
Port P3 pin schematic: P3.0 to P3.7, input/output with Schmitt trigger
Pad Logic
DVSS
DVCC
P3DIR.x
Module
direction
0
1
Direction
0: Input
1: Output
0
1
1
P3REN.x
P3OUT.x
Module X OUT
P3SEL.x
P3IN.x
0
1
P3.0/UCB0STE/UCA0CLK
P3.1/UCB0SIMO/UCB0SDA
P3.2/UCB0SOMI/UCB0SCL
P3.3/UCB0CLK/UCA0STE
P3.4/UCA0TXD/UCA0SIMO
P3.5/UCA0RXD/UCA0SOMI
P3.6/UCA1TXD/UCA1SIMO
P3.7/UCA1RXD/UCA1SOMI
EN
Module X IN
D
Port P3.0 to P3.7 pin functions
PIN NAME (P3.X)
(P3 X)
P3.0/UCB0STE/
/
/
UCA0CLK
P3.1/UCB0SIMO/
/
/
UCB0SDA
P3.2/UCB0SOMI/
/
/
UCB0SCL
P3.3/UCB0CLK/
/
/
UCA0STE
P3.4/UCA0TXD/
/
/
UCA0SIMO
P3.5/UCA0RXD/
/
/
UCA0SOMI
P3.6/UCA1TXD
鈥?/div>
/
/
UCA1SIMO
鈥?/div>
P3.7/UCA1RXD
鈥?/div>
/
/
UCA1SOMI
鈥?/div>
鈥?/div>
X
0
1
2
3
4
5
6
7
P3.0 (I/O)
FUNCTION
CONTROL BITS / SIGNALS
P3DIR.x
I: 0; O: 1
X
I: 0; O: 1
X
I: 0; O: 1
X
I: 0; O: 1
X
I: 0; O: 1
X
I: 0; O: 1
X
I: 0; O: 1
X
I: 0; O: 1
X
P3SEL.x
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
UCB0STE/UCA0CLK (see Notes 2 and 4)
P3.1 (I/O)
UCB0SIMO/UCB0SDA (see Notes 2 and 3)
P3.2 (I/O)
UCB0SOMI/UCB0SCL (see Notes 2 and 3)
P3.3 (I/O)
UCB0CLK/UCA0STE (see Note 2)
P3.4 (I/O)
UCA0TXD/UCA0SIMO (see Note 2)
P3.5 (I/O)
UCA0RXD/UCA0SOMI (see Note 2)
P3.6 (I/O)
UCA1TXD
鈥?/div>
/UCA1SIMO
鈥?/div>
(see Note 2)
P3.7 (I/O)
UCA1RXD
鈥?/div>
/UCA1SOMI
鈥?/div>
(see Note 2)
MSP430F24x and MSP430F24x1 devices only
NOTES: 1. X: Don鈥檛 care.
2. The pin direction is controlled by the USCI module.
3. In case the I2C functionality is selected the output drives only the logical 0 to V
SS
level.
4. UCA0CLK function takes precedence over UCB0STE function. If the pin is required as UCA0CLK input or output USCI A/B0 will
be forced to 3--wire SPI mode if 4--wire SPI mode is selected.
76
POST OFFICE BOX 655303
鈥?/div>
DALLAS, TEXAS 75265

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