最新免费av在线观看,亚洲综合一区成人在线,中文字幕精品无码一区二区三区,中文人妻av高清一区二区,中文字幕乱偷无码av先锋

MSP430F247TRGC Datasheet

  • MSP430F247TRGC

  • Texas Instruments [MIXED SIGNAL MICROCONTROLLER]

  • TI

掃碼查看芯片數(shù)據(jù)手冊(cè)

上傳產(chǎn)品規(guī)格書(shū)

PDF預(yù)覽

MSP430x23x, MSP430x24x(1), MSP430x2410
MIXED SIGNAL MICROCONTROLLER
SLAS547A -- JUNE 2007 -- REVISED NOVEMBER 2007
Terminal Functions - MSP430F24x1 (Continued)
-
TERMINAL
NAME
P4.2/TB2
P4.3/TB3
P4.4/TB4
P4.5/TB5
P4.6/TB6
P4.7/TBCLK
P5.0/UCB1STE/
UCA1CLK
P5.1/UCB1SIMO/
UCB1SDA
P5.2/UCB1SOMI/
UCB1SCL
P5.3/UCB1CLK/
UCA1STE
P5.4/MCLK
P5.5/SMCLK
P5.6/ACLK
P5.7/TBOUTH/
SVSOUT
P6.0
P6.1
P6.2
P6.3
P6.4
P6.5
P6.6
P6.7/SVSIN
XT2OUT
XT2IN
RST/NMI
TCK
TDI/TCLK
TDO/TDI
TMS
DV
SS
Reserved
DV
SS
XIN
XOUT
QFN Pad
NO.
38
39
40
41
42
43
44
45
46
47
48
49
50
51
59
60
61
2
3
4
5
6
52
53
58
57
55
54
56
10
7
11
8
9
NA
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
I
I
I
I
I/O
I
I
O
I
I
O
NA
DESCRIPTION
General-purpose digital I/O / Timer_B, capture: CCI2A/B input, compare: Out2 output
General-purpose digital I/O / Timer_B, capture: CCI3A/B input, compare: Out3 output
General-purpose digital I/O / Timer_B, capture: CCI4A/B input, compare: Out4 output
General-purpose digital I/O / Timer_B, capture: CCI5A/B input, compare: Out5 output
General-purpose digital I/O / Timer_B, capture: CCI6A input, compare: Out6 output
General-purpose digital I/O / Timer_B, clock signal TBCLK input
General-purpose digital I/O / USCI B1 slave transmit enable/USCI A1 clock input/output
General-purpose digital I/O / USCI B1 slave in/master out in SPI mode, SDA I
2
C data in I
2
C mode
General-purpose digital I/O / USCI B1 slave out/master in in SPI mode, SCL I
2
C clock in I
2
C mode
General-purpose digital I/O / USCI B1 clock input/output, USCI A1 slave transmit enable
General-purpose digital I/O / main system clock MCLK output
General-purpose digital I/O / submain system clock SMCLK output
General-purpose digital I/O / auxiliary clock ACLK output
General-purpose digital I/O / switch all PWM digital output ports to high impedance -- Timer_B TB0 to
TB6/SVS comparator output
General-purpose digital I/O
General-purpose digital I/O
General-purpose digital I/O
General-purpose digital I/O
General-purpose digital I/O
General-purpose digital I/O
General-purpose digital I/O
General-purpose digital I/O / SVS input
Output terminal of crystal oscillator XT2
Input port for crystal oscillator XT2
Reset input, nonmaskable interrupt input port, or bootstrap loader start (in Flash devices).
Test clock (JTAG). TCK is the clock input port for device programming test and bootstrap loader start
Test data input or test clock input. The device protection fuse is connected to TDI/TCLK.
Test data output port. TDO/TDI data output or programming data input terminal
Test mode select. TMS is used as an input port for device programming and test.
Connected to DV
SS
Reserved, do not connect externally
Connected to DV
SS
Input port for crystal oscillator XT1. Standard or watch crystals can be connected.
Output port for crystal oscillator XT1. Standard or watch crystals can be connected.
QFN package pad connection to DV
SS
recommended (RTD package only)
14
POST OFFICE BOX 655303
鈥?/div>
DALLAS, TEXAS 75265

MSP430F247TRGC相關(guān)型號(hào)PDF文件下載

掃碼下載APP，
一鍵連接廣大的電子世界。

在線人工客服

買(mǎi)家服務(wù)：
賣(mài)家服務(wù)：
技術(shù)客服：

0571-85317607

網(wǎng)站技術(shù)支持

13606545031

客服在線時(shí)間周一至周五
9:00-17:30

關(guān)注官方微信號(hào)，
第一時(shí)間獲取資訊。

建議反饋

聯(lián)系人：

聯(lián)系方式：

按住滑塊，拖拽到最右邊
>>
感謝您向阿庫(kù)提出的寶貴意見(jiàn)，您的參與是維庫(kù)提升服務(wù)的動(dòng)力！意見(jiàn)一經(jīng)采納，將有感恩紅包奉上哦！