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MSP430F247TRGC Datasheet

  • MSP430F247TRGC

  • Texas Instruments [MIXED SIGNAL MICROCONTROLLER]

  • TI

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MSP430x23x, MSP430x24x(1), MSP430x2410
MIXED SIGNAL MICROCONTROLLER
SLAS547A -- JUNE 2007 -- REVISED NOVEMBER 2007
Terminal Functions - MSP430F23x (Continued)
-
TERMINAL
NAME
P4.2/TB2
P4.3
P4.4
P4.5
P4.6
P4.7/TBCLK
P5.0
P5.1
P5.2
P5.3
P5.4/MCLK
P5.5/SMCLK
P5.6/ACLK
P5.7/TBOUTH/
SVSOUT
P6.0/A0
P6.1/A1
P6.2/A2
P6.3/A3
P6.4/A4
P6.5/A5
P6.6/A6
P6.7/A7/SVSIN
XT2OUT
XT2IN
RST/NMI
TCK
TDI/TCLK
TDO/TDI
TMS
Ve
REF+
V
REF+
V
REF--
/Ve
REF--
XIN
XOUT
QFN Pad
NO.
38
39
40
41
42
43
44
45
46
47
48
49
50
51
59
60
61
2
3
4
5
6
52
53
58
57
55
54
56
10
7
11
8
9
NA
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
I
I
I
I
I/O
I
I
O
I
I
O
NA
DESCRIPTION
General-purpose digital I/O / Timer_B, capture: CCI2A/B input, compare: Out2 output
General-purpose digital I/O
General-purpose digital I/O
General-purpose digital I/O
General-purpose digital I/O
General-purpose digital I/O / Timer_B, clock signal TBCLK input
General-purpose digital I/O
General-purpose digital I/O
General-purpose digital I/O
General-purpose digital I/O
General-purpose digital I/O / main system clock MCLK output
General-purpose digital I/O / submain system clock SMCLK output
General-purpose digital I/O / auxiliary clock ACLK output
General-purpose digital I/O / switch all PWM digital output ports to high impedance -- Timer_B TB0 to
TB6/SVS comparator output
General-purpose digital I/O / analog input A0 鈥?12-bit ADC
General-purpose digital I/O / analog input A1 鈥?12-bit ADC
General-purpose digital I/O / analog input A2 鈥?12-bit ADC
General-purpose digital I/O / analog input A3 鈥?12-bit ADC
General-purpose digital I/O / analog input A4 鈥?12-bit ADC
General-purpose digital I/O / analog input A5 鈥?12-bit ADC
General-purpose digital I/O / analog input A6 鈥?12-bit ADC
General-purpose digital I/O / analog input A7 鈥?12-bit ADC/SVS input
Output terminal of crystal oscillator XT2
Input port for crystal oscillator XT2
Reset input, nonmaskable interrupt input port, or bootstrap loader start (in Flash devices).
Test clock (JTAG). TCK is the clock input port for device programming test and bootstrap loader start
Test data input or test clock input. The device protection fuse is connected to TDI/TCLK.
Test data output port. TDO/TDI data output or programming data input terminal
Test mode select. TMS is used as an input port for device programming and test.
Input for an external reference voltage
Output of positive terminal of the reference voltage in the ADC12
Negative terminal for the reference voltage for both sources, the internal reference voltage, or an external
applied reference voltage
Input port for crystal oscillator XT1. Standard or watch crystals can be connected.
Output port for crystal oscillator XT1. Standard or watch crystals can be connected.
QFN package pad connection to DV
SS
recommended
10
POST OFFICE BOX 655303
鈥?/div>
DALLAS, TEXAS 75265

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