鈭?/div>
Q
5
V
CC
, V
CCO
V
EE
NC
FUNCTION
ECL Data Inputs
ECL Clock Inputs
ECL Master Reset
ECL Differential Outputs
Positive Supply
Negative Supply
No Connect
D
5
D
4
D
3
V
EE
D
2
D
1
D
0
24
23
22
21
20
2
3
4
5
6
7
8
Q
0
9
Q
1
10
11
NC V
CCO
Q
0
Q
1
V
CCO
* All V
CC
and V
CCO
pins are tied together on the die.
Warning: All V
CC
, V
CCO
, and V
EE
pins must be externally
connected to Power Supply to guarantee proper operation.
Figure 1. Pinout: PLCC鈭?8
(Top View)
D
0
D
R
Q
0
Q
0
Q
1
R
Q
1
Q
2
R
Q
2
Q
3
R
Q
3
Q
4
R
Q
4
Q
5
R
Q
5
Table 2. FUNCTION TABLE
MR
1
Reset
Operational
Qn
L
H
D
1
D
0
D
2
D
D
3
D
D
4
D
D
5
D
CLK1
CLK2
MR
Figure 2. Logic Diagram
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2