the VADJ input. The PWM signal frequency should be
鈭?/div>
3.0
)
higher than 150KHz and contain a DC component less than
Therefore
,
V
RIPPLE
=飥?2.0mV + 18.4mV + 10mV = 30.4mV
350mV.
The LX1993 exhibits a low quiescent current (I
Q
< 0.5碌A(chǔ):
D
IODE
S
ELECTION
A Schottky diode is recommended for most applications typ) during shutdown mode. The SHDN pin is used to
exercise the shutdown function on the evaluation board.
(e.g., Microsemi UPS5817). The low forward voltage drop
This pin is pulled-up to VCC via a 10K鈩?resistor.
and fast recovery time associated with this device supports
Grounding the SHDN pin shuts down the IC (not the circuit
the switching demands associated with this circuit
output). The output voltage (i.e., voltage across the LED
topology. The designer is encouraged to consider the
diode鈥檚 average and peak current ratings with respect to the string) is readily measured at the VOUT terminal and LED
current is derived from measuring the voltage at the VFDBK
application鈥檚 output and peak inductor current
pin and dividing this value by 15鈩?(i.e., R4). The factory
requirements. Further, the diode鈥檚 reverse breakdown
installed component list for this must-have design tool is
voltage characteristic must be capable of withstanding a
provided in Table 3 and the schematic is shown in Figure 4.
negative voltage transition that is greater than V
OUT
.
Efficiency Measurement Hint:
When doing an efficiency
PCB L
AYOUT
evaluation using the LX1993 Evaluation Board, VPOT
The LX1993 produces high slew-rate voltage and
should be driven by a separate voltage supply to account for
current waveforms hence; the designer should take this into
losses associated with the onboard reference (i.e., the 1.25V
consideration when laying out the circuit. Minimizing
shunt regulator and 1K鈩?resistor). This circuit will have
trace lengths from the IC to the inductor, diode, input and
VBAT - 1.25V across it and at the higher input voltages the
output capacitors, and feedback connection (i.e., pin 3) are
1K鈩?resistor could have as much as 4mA through it. This
typical considerations. Moreover, the designer should
shunt regulator circuitry will adversely effect the overall
maximize the DC input and output trace widths to
efficiency measurement. It is not normally used in an
accommodate peak current levels associated with this
application; hence, it should not be considered when
topology.
measuring efficiency.
Copyright
漏
2000
Rev. 1.0b, 2005-03-03
鈳?/div>
L
鈳?/div>
鈳?/div>
鈳?/div>
脳
(
I
PK
脳
I
OUT
)
鈳?/div>
C
鈳?/div>
鈳?/div>
OUT
鈳?/div>
=
E
VALUATION
B
OARD
A
PPLICATIONS
A
PPLICATIONS
Microsemi
Integrated Products Division
11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page 6
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