LX1993
I N T E G R A T E D
P R O D U C T S
High Efficiency LED Driver
P
RODUCTION
APPLICATION INFORMATION
WWW .
Microsemi
.C
OM
O
PERATING
T
HEORY
The LX1993 is a PFM boost converter that is
optimized for driving a string of series connected LEDs. It
operates in a pseudo-hysteretic mode with a fixed switch
鈥渙ff time鈥?of 300ns. Converter switching is enabled as
LED current decreases causing the voltage across R
SET
to
decrease to a value less than the voltage at the VADJ pin.
When the voltage across R
SET
(i.e., V
FB
) is less than VADJ,
comparator A1 activates the control logic. The control
logic activates the DRV output circuit that connects to the
gate of the internal FET. The output (i.e., SW) is switched
鈥渙n鈥?(and remains 鈥渙n鈥? until the inductor current ramps up
to the peak current level. This current level is set via the
external R
CS
resistor and monitored through the CS input by
comparator A2.
The LED load is powered from energy stored in the
output capacitor during the inductor charging cycle. Once
the peak inductor current value is achieved, the output is
turned off (off-time is typically 300ns) allowing a portion
of the energy stored in the inductor to be delivered to the
load (e.g., see Figure 6, channel 2). This causes the output
voltage to continue to rise across R
SET
at the input to the
feedback circuit. The LX1993 continues to switch until the
voltage at the FB pin exceeds the control voltage at the ADJ
pin. The value of R
SET
is established by dividing the
maximum adjust voltage by the maximum series LED
current. A minimum value of 15鈩?is recommended for
R
SET
. The voltage at the FB pin is the product of I
OUT
(i.e.,
the current through the LED chain) and R
SET
.
V
鈳?/div>
R
=
鈳?/div>
ADJmax
鈳?/div>
I
LEDmax
鈳?/div>
SET
鈳?/div>
鈳?/div>
I
NDUCTOR
S
ELECTION AND
O
UTPUT
C
URRENT
L
IMIT
P
ROGRAMMING
Setting the level of peak inductor current to approximately
2X
the expected maximum DC input current will minimize
the inductor size, the input ripple current, and the output
ripple voltage. The designer is encouraged to use inductors
that will not saturate at the peak inductor current level. An
inductor value of 47碌H is recommended. Choosing a lower
value emphasizes peak current overshoot while choosing a
higher value emphasizes output ripple voltage. The peak
switch current is defined using a resistor placed between the
CS terminal and ground and the I
PEAK
equation is:
I
PEAK
=
I
MIN
+
鈳?/div>
V
IN
L
鈳?/div>
t
D
+
(
I
SCALE
)
R
鈳?/div>
鈳?/div>
鈳?/div>
鈳?/div>
CS
The maximum I
PEAK
value is limited by the I
SW
value
(max. = 500mA rms). The minimum I
PEAK
value is defined
when R
CS
is zero. The minimum I
PEAK
value is defined when
R
CS
is zero. A typical value for the minimum peak current
(I
MIN
) at 25
o
C is 197mA. The parameter t
D
is related to
internal operation of comparator A. A typical value at 25
o
C
is 850ns. A typical value of I
SCALE
at 25
o
C is 44mA per K鈩?
All of these parameters have an effect on the final I
PEAK
value.
D
ESIGN
E
XAMPLE
:
Determine I
PEAK
where V
IN
equals 3.0V and R
CS
equals
4.02K鈩?using nominal values for all other parameters.
鈳?/div>
脳
850ns
+
44mA
脳
4.02K
I
PEAK
=
197mA
+
鈳?/div>
3.0V
鈩?/div>
鈳?/div>
47碌7
鈳?/div>
k鈩?/div>
鈳?/div>
鈳?/div>
(
)
The application of an external voltage source at the
ADJ pin provides for output current adjustment over the
entire dimming range and the designer can select one of
two possible methods. The first option is to connect a
PWM logic signal to the ADJ pin (e.g., see Figure 1). The
LX1993 includes an internal 50pF capacitor to ground that
works with an external resistor to create a low-pass filter
(i.e., filter out the AC component of a pulse width
modulated input of f
PWM
鈮?/div>
100KHz). The second option is
to adjust the reference voltage directly at the ADJ pin by
applying a DC voltage from 0.0 to 0.3V (e.g., see Figure
2). The adjustment voltage level is selectable (with limited
accuracy) by implementing the voltage divider created
between the external series resistor and the internal 2.5M鈩?/div>
resistor. Disabling the LX1993 is achieved by driving the
SHDN pin with a low-level logic signal thus reducing the
device power consumption to approximately 0.5碌A(chǔ) (typ).
The result of this example yields a nominal I
PEAK
of
approximately 428mA.
O
UTPUT
R
IPPLE AND
C
APACITOR
S
ELECTION
Output voltage ripple is a function of the inductor value
(L), the output capacitor value (C
OUT
), the peak switch
current setting (I
PEAK
), the load current (I
OUT
), the input
voltage (V
IN
) and the output voltage (V
OUT
) for a this boost
converter regulation scheme. When the switch is first turned
on, the peak-to-peak voltage ripple is a function of the output
droop (as the inductor current charges to I
PEAK
), the feedback
transition error (i.e., typically 10mV), and the output
overshoot (when the stored energy in the inductor is
delivered to the load at the end of the charging cycle).
Therefore the total ripple voltage is
V
RIPPLE
=
鈭哣
DROOP
+
鈭哣
OVERSHOOT
+ 10mV
The initial droop can be estimated as follows where the
0.5V value in the denominator is an estimate of the voltage
drop across the inductor and the FET RDS_ON:
Page 5
A
PPLICATIONS
A
PPLICATIONS
Copyright
漏
2000
Rev. 1.0b, 2005-03-03
Microsemi
Integrated Products Division
11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
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