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LX1691 Datasheet

  • LX1691

  • Microsemi Corporation [Enhanced Multi-Mode CCFL Controller]

  • 270.47KB

  • MICROSEMI

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LX1691
TM
Enhanced Multi-Mode CCFL Controller
P
RODUCTION
D
ATA
S
HEET
DETAILED DESCRIPTION (CONTINUED)
WWW .
Microsemi
.C
OM
LX1691 Operation
Four operating modes: Power On Delay, Strike, Run, and Fault
modes are employed by the LX1691. Upon power up or ENABLE
going true, Power On Delay is automatically invoked.
Immediately after termination of Power On Delay, or ENABLE
going true, strike mode is entered. After a successful strike, e.g.,
lamp is ignited, run mode is entered. If ignition is unsuccessful, or
if the lamp extinguishes while running, Fault mode is entered.
Lamp ignition is determined by monitoring the lamp current
feedback voltage at pin I_SNS. Lamp current cycles are counted
from the beginning of Strike mode. If 4 or more complete cycles
occur the lamp is declared ignited. If less than 4, the lamp is
considered not ignited and Strike mode continues until ignition is
detected or strike time out (approximately 350ms) is reached.
After run mode is entered lamp current pulse count is sampled
several times a second to determine that the lamp has not
inadvertently extinguished. If lamp current pulses are counted in
each sample, Run mode is maintained. Otherwise, Fault mode is
entered. Strike mode can be entered only once for each on/off cycle
of either V
DDP
or ENABLE. This insures that even intermittent
lamp failures cannot cause the module to continuously output
maximum strike voltage.
During strike, operating frequency is swept from the normal run
value approximately to 3X run frequency. This will excite the
unloaded resonant frequency of the transformer and lamp load to
generate the required lamp striking voltage. If the lamp has not
ignited after about 350mS, a fault is declared and the A & B
outputs are shut off.
If while strike frequency is sweeping, the over voltage set point
at OV_SNS is detected or overcurrent voltage set point at
OV_SNS is deteted the, strike frequency will hold at the frequency
value until either the lamp strikes or the timeout is reached. This
causes maximum strike potential to be continuously impressed
across the lamp for the entire strike period.
Also, if while strike frequency is sweeping, the over current set
point at OC_SNS is detected, strike frequency will hold at the
present value until either the lamp strikes or the timeout is reached.
This insures short circuit current regulation will be maintained, thus
enabling UL fault requirements to be easily met at the inverter
module level.
The only way to re-initiate the strike process is to either cycle
VDDP or ENABLE off and on.
If ignition is successful, ramp frequency immediately returns to
its programmed run value.
Power ON Delay Mode
All functions are activated except that AOUT and BOUT are
inhibited. Delay is in the 100mSec range and is determined by a
counter. Power on delay is activated at every V
DDP
power up
sequence and ENABLE sequence.
Strike Mode
Entered from Power On Delay, or upon an ENABLE sequence.
Control of the Ramp Generator frequency is switched to the DAC
output. Frequency is increased from its normal run value to up to
three times that value for up to 6 sweeps If while strike frequency is
sweeping, the set points at OV_SNS and / or OC_SNS are detected,
strike frequency will freeze at the present value until either the lamp
strikes or the timeout is reached. Strike Mode is terminated by
reaching 6 sweep counts or by detecting lamp ignition. If strike is
successful, Run Mode is entered. If unsuccessful, Fault mode is
entered.
Run Mode
Entered only by detection of a successful Strike. Frequency
control is immediately switched to a fixed reference that sets the
programmed run frequency. The lamp current cycle counter is
monitored to insure at least 4 current cycles received during each
period. If less than 4, the lamp is considered extinguished and the
Fault Mode is entered.
Fault Mode
Fault Mode may be entered from either Strike or Run Mode as
described above. In Fault Mode, the A & B output buffers are
forced low. Fault mode may be cleared by cycling ENABLE off
then on, or by removing and applying V
DDP
.
Design Procedure
Selecting the I_R resistor value
This resistor determines the value of several internal reference
currents that control timing. It must be chosen first, and will be in
the range of 40 to 120K ohms. We use an 80.6K, 1% low TCR
value in our designs to set nominal lamp current frequency to
65kHz. The output frequency is approximated by the following
formula: R
I_R
= 5.24E9 / F
LAMPOUT/HZ
.
Driving the BRITE_IN Input
The BRITE_IN input circuitry includes on-chip active voltage
clamps that ignore input voltage greater than 2.0V.
Input
impedance is very high so it can also be driven from a 100K
potentiometer with no offset error. BRITE_IN can be a DC voltage,
or a higher frequency externally filter PWM The BRITE_IN input
has a linear active range between 0.0 and 2.0V
D
ESCRIPTION
D
ESCRIPTION
Copyright
2003
Rev. 1.0, 7/16/2004
Microsemi
Integrated Products
11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page 11

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